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author | Serge Pavlov <sepavloff@gmail.com> | 2014-05-12 05:44:53 +0000 |
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committer | Serge Pavlov <sepavloff@gmail.com> | 2014-05-12 05:44:53 +0000 |
commit | 0581109708b995167af55b08db60965688fd61c8 (patch) | |
tree | 73f07f6216ae50b89b83ed03f3bf78ba0e19168c | |
parent | 36250ad632a5a2611919413c1a00a1b9f338fc85 (diff) | |
download | bcm5719-llvm-0581109708b995167af55b08db60965688fd61c8.tar.gz bcm5719-llvm-0581109708b995167af55b08db60965688fd61c8.zip |
Fix reordering of shuffles and binary operations
Do not apply transformation:
BinOp(shuffle(v1), shuffle(v2)) -> shuffle(BinOp(v1, v2))
if operands v1 and v2 are of different size.
This change fixes PR19717, which was caused by r208488.
llvm-svn: 208518
-rw-r--r-- | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp | 1 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/vec_shuffle.ll | 12 |
2 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp index 82b7cae410c..90ca8863e8c 100644 --- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp +++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp @@ -1120,6 +1120,7 @@ Value *InstCombiner::SimplifyVectorOp(BinaryOperator &Inst) { ShuffleVectorInst *RShuf = cast<ShuffleVectorInst>(RHS); if (isa<UndefValue>(LShuf->getOperand(1)) && isa<UndefValue>(RShuf->getOperand(1)) && + LShuf->getOperand(0)->getType() == RShuf->getOperand(0)->getType() && LShuf->getMask() == RShuf->getMask()) { BinaryOperator *NewBO = CreateBinOpAsGiven(Inst, LShuf->getOperand(0), RShuf->getOperand(0), Builder); diff --git a/llvm/test/Transforms/InstCombine/vec_shuffle.ll b/llvm/test/Transforms/InstCombine/vec_shuffle.ll index d619ed0e13d..79377a18765 100644 --- a/llvm/test/Transforms/InstCombine/vec_shuffle.ll +++ b/llvm/test/Transforms/InstCombine/vec_shuffle.ll @@ -363,3 +363,15 @@ define <4 x i32> @shuffle_17mulsplat(<4 x i32> %v) { <4 x i32> <i32 1, i32 1, i32 1, i32 1> ret <4 x i32> %s2 } + +; Do not reorder shuffle and binop if LHS of shuffles are of different size +define <2 x i32> @pr19717(<4 x i32> %in0, <2 x i32> %in1) { +; CHECK-LABEL: @pr19717( +; CHECK: shufflevector +; CHECK: shufflevector +; CHECK: mul + %shuffle = shufflevector <4 x i32> %in0, <4 x i32> %in0, <2 x i32> zeroinitializer + %shuffle4 = shufflevector <2 x i32> %in1, <2 x i32> %in1, <2 x i32> zeroinitializer + %mul = mul <2 x i32> %shuffle, %shuffle4 + ret <2 x i32> %mul +} |