diff options
author | Devang Patel <dpatel@apple.com> | 2011-01-25 18:09:33 +0000 |
---|---|---|
committer | Devang Patel <dpatel@apple.com> | 2011-01-25 18:09:33 +0000 |
commit | 04b649d48a3aa24c99a614bcff924d59480cab99 (patch) | |
tree | eaa15d75487dfbaccd2e08f4dd44637b2f28d3da | |
parent | e771e763262fbd2aa44dd2a073d54f0d4c265a6b (diff) | |
download | bcm5719-llvm-04b649d48a3aa24c99a614bcff924d59480cab99.tar.gz bcm5719-llvm-04b649d48a3aa24c99a614bcff924d59480cab99.zip |
This assertion is too restrictive, it does not apply for dangling dbg value nodes (nodes where dbg.value intrinsic preceds use of the value).
llvm-svn: 124202
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index 57fc0aa3f3b..5d20fd70a47 100644 --- a/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -619,16 +619,8 @@ MachineBasicBlock *ScheduleDAGSDNodes::EmitSchedule() { // Insert all SDDbgValue's whose order(s) are before "Order". if (!MI) continue; -#ifndef NDEBUG - unsigned LastDIOrder = 0; -#endif for (; DI != DE && (*DI)->getOrder() >= LastOrder && (*DI)->getOrder() < Order; ++DI) { -#ifndef NDEBUG - assert((*DI)->getOrder() >= LastDIOrder && - "SDDbgValue nodes must be in source order!"); - LastDIOrder = (*DI)->getOrder(); -#endif if ((*DI)->isInvalidated()) continue; MachineInstr *DbgMI = Emitter.EmitDbgValue(*DI, VRBaseMap); |