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author | Chad Rosier <mcrosier@apple.com> | 2012-10-04 23:59:38 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2012-10-04 23:59:38 +0000 |
commit | 0397edd9c8d47ddf66ad967c7ed64c978c8309e8 (patch) | |
tree | 17ecdedae5a93a93b365c6adf9ff97cf70bab95c | |
parent | 70fd574c2e0fed3d1b4b18fd7ddc44766767264e (diff) | |
download | bcm5719-llvm-0397edd9c8d47ddf66ad967c7ed64c978c8309e8.tar.gz bcm5719-llvm-0397edd9c8d47ddf66ad967c7ed64c978c8309e8.zip |
[ms-inline asm] Add support for parsing [Intel dialect] memory operands that use
segmented registers. Test case to come.
llvm-svn: 165275
-rw-r--r-- | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index 704d5f94261..24f57e071cd 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -53,7 +53,7 @@ private: X86Operand *ParseOperand(); X86Operand *ParseATTOperand(); X86Operand *ParseIntelOperand(); - X86Operand *ParseIntelMemOperand(); + X86Operand *ParseIntelMemOperand(unsigned SegReg, SMLoc StartLoc); X86Operand *ParseIntelBracExpression(unsigned SegReg, unsigned Size); X86Operand *ParseMemOperand(unsigned SegReg, SMLoc StartLoc); @@ -729,10 +729,9 @@ X86Operand *X86AsmParser::ParseIntelBracExpression(unsigned SegReg, } /// ParseIntelMemOperand - Parse intel style memory operand. -X86Operand *X86AsmParser::ParseIntelMemOperand() { +X86Operand *X86AsmParser::ParseIntelMemOperand(unsigned SegReg, SMLoc Start) { const AsmToken &Tok = Parser.getTok(); - SMLoc Start = Parser.getTok().getLoc(), End; - unsigned SegReg = 0; + SMLoc End; unsigned Size = getIntelMemOperandSize(Tok.getString()); if (Size) { @@ -776,12 +775,17 @@ X86Operand *X86AsmParser::ParseIntelOperand() { // register unsigned RegNo = 0; if (!ParseRegister(RegNo, Start, End)) { - End = Parser.getTok().getLoc(); - return X86Operand::CreateReg(RegNo, Start, End); + // If this is a segment register followed by a ':', then this is the start + // of a memory reference, otherwise this is a normal register reference. + if (getLexer().isNot(AsmToken::Colon)) + return X86Operand::CreateReg(RegNo, Start, Parser.getTok().getLoc()); + + getParser().Lex(); // Eat the colon. + return ParseIntelMemOperand(RegNo, Start); } // mem operand - return ParseIntelMemOperand(); + return ParseIntelMemOperand(0, Start); } X86Operand *X86AsmParser::ParseATTOperand() { |