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authorDavid Bolvansky <david.bolvansky@gmail.com>2019-05-25 22:34:27 +0000
committerDavid Bolvansky <david.bolvansky@gmail.com>2019-05-25 22:34:27 +0000
commit0290a77aa8609a99ba613efef40ec1626aec362d (patch)
tree1b5198c32d9867b09676ec6eb896f98fa8fc33f6
parent40fa52b1749a6286331e993177043fc51812f8a1 (diff)
downloadbcm5719-llvm-0290a77aa8609a99ba613efef40ec1626aec362d.tar.gz
bcm5719-llvm-0290a77aa8609a99ba613efef40ec1626aec362d.zip
[SimplifyCFG] Added condition assumption for unreachable blocks
Summary: PR41688 Reviewers: spatel, efriedma, craig.topper, hfinkel, reames Reviewed By: hfinkel Subscribers: javed.absar, dmgreen, fhahn, hfinkel, reames, nikic, lebedev.ri, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D61409 llvm-svn: 361707
-rw-r--r--llvm/lib/Transforms/Utils/SimplifyCFG.cpp3
-rw-r--r--llvm/test/Analysis/ValueTracking/select-pattern.ll2
-rw-r--r--llvm/test/Transforms/CallSiteSplitting/split-loop.ll9
-rw-r--r--llvm/test/Transforms/LoopVectorize/if-pred-stores.ll10
-rw-r--r--llvm/test/Transforms/SimplifyCFG/PR30210.ll4
-rw-r--r--llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll12
-rw-r--r--llvm/test/Transforms/SimplifyCFG/unreachable_assume.ll15
7 files changed, 44 insertions, 11 deletions
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index d571648c99f..90b552035af 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -4205,10 +4205,13 @@ bool SimplifyCFGOpt::SimplifyUnreachable(UnreachableInst *UI) {
Changed = true;
}
} else {
+ Value* Cond = BI->getCondition();
if (BI->getSuccessor(0) == BB) {
+ Builder.CreateAssumption(Builder.CreateNot(Cond));
Builder.CreateBr(BI->getSuccessor(1));
EraseTerminatorAndDCECond(BI);
} else if (BI->getSuccessor(1) == BB) {
+ Builder.CreateAssumption(Cond);
Builder.CreateBr(BI->getSuccessor(0));
EraseTerminatorAndDCECond(BI);
Changed = true;
diff --git a/llvm/test/Analysis/ValueTracking/select-pattern.ll b/llvm/test/Analysis/ValueTracking/select-pattern.ll
index 4f19c292bae..1ab4c1edd13 100644
--- a/llvm/test/Analysis/ValueTracking/select-pattern.ll
+++ b/llvm/test/Analysis/ValueTracking/select-pattern.ll
@@ -8,6 +8,8 @@
define void @PR36045(i1 %t, i32* %b) {
; CHECK-LABEL: @PR36045(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[T:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret void
;
entry:
diff --git a/llvm/test/Transforms/CallSiteSplitting/split-loop.ll b/llvm/test/Transforms/CallSiteSplitting/split-loop.ll
index b64a072a583..1e71643b7b9 100644
--- a/llvm/test/Transforms/CallSiteSplitting/split-loop.ll
+++ b/llvm/test/Transforms/CallSiteSplitting/split-loop.ll
@@ -5,6 +5,9 @@ define i16 @test1() {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 undef, i16 1, i16 0
+; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i16 [[SPEC_SELECT]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[TOBOOL18]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND12:%.*]]
; CHECK: for.cond12:
; CHECK-NEXT: call void @callee(i16 [[SPEC_SELECT]])
@@ -27,6 +30,9 @@ define i16 @test2() {
; CHECK-LABEL: @test2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[S:%.*]] = select i1 undef, i16 1, i16 0
+; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i16 [[S]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[TOBOOL18]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND12:%.*]]
; CHECK: for.cond12:
; CHECK-NEXT: call void @callee(i16 [[S]])
@@ -53,6 +59,9 @@ define i16 @test3() {
; CHECK-LABEL: @test3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[S:%.*]] = select i1 undef, i16 1, i16 0
+; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp ne i16 [[S]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[TOBOOL18]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND12:%.*]]
; CHECK: for.cond12:
; CHECK-NEXT: call void @callee(i16 [[S]])
diff --git a/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll b/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
index f82311e1c12..353087f66e5 100644
--- a/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+++ b/llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
@@ -197,6 +197,8 @@ for.end:
define void @bug18724(i1 %cond) {
; UNROLL-LABEL: @bug18724(
; UNROLL-NEXT: entry:
+; UNROLL-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; UNROLL-NEXT: call void @llvm.assume(i1 [[TMP0]])
; UNROLL-NEXT: br label [[FOR_BODY14:%.*]]
; UNROLL: for.body14:
; UNROLL-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ undef, [[ENTRY:%.*]] ]
@@ -211,6 +213,9 @@ define void @bug18724(i1 %cond) {
; UNROLL: for.inc23:
; UNROLL-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]
; UNROLL-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1
+; UNROLL-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32
+; UNROLL-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0
+; UNROLL-NEXT: call void @llvm.assume(i1 [[CMP13]])
; UNROLL-NEXT: br label [[FOR_BODY14]]
;
; UNROLL-NOSIMPLIFY-LABEL: @bug18724(
@@ -287,6 +292,8 @@ define void @bug18724(i1 %cond) {
;
; VEC-LABEL: @bug18724(
; VEC-NEXT: entry:
+; VEC-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; VEC-NEXT: call void @llvm.assume(i1 [[TMP0]])
; VEC-NEXT: br label [[FOR_BODY14:%.*]]
; VEC: for.body14:
; VEC-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT4:%.*]], [[FOR_INC23:%.*]] ], [ undef, [[ENTRY:%.*]] ]
@@ -301,6 +308,9 @@ define void @bug18724(i1 %cond) {
; VEC: for.inc23:
; VEC-NEXT: [[INEWCHUNKS_2]] = phi i32 [ [[INC21]], [[IF_THEN18]] ], [ [[INEWCHUNKS_120]], [[FOR_BODY14]] ]
; VEC-NEXT: [[INDVARS_IV_NEXT4]] = add nsw i64 [[INDVARS_IV3]], 1
+; VEC-NEXT: [[TMP1:%.*]] = trunc i64 [[INDVARS_IV3]] to i32
+; VEC-NEXT: [[CMP13:%.*]] = icmp slt i32 [[TMP1]], 0
+; VEC-NEXT: call void @llvm.assume(i1 [[CMP13]])
; VEC-NEXT: br label [[FOR_BODY14]]
;
entry:
diff --git a/llvm/test/Transforms/SimplifyCFG/PR30210.ll b/llvm/test/Transforms/SimplifyCFG/PR30210.ll
index d1b0a4cd499..bc422ddcd5f 100644
--- a/llvm/test/Transforms/SimplifyCFG/PR30210.ll
+++ b/llvm/test/Transforms/SimplifyCFG/PR30210.ll
@@ -10,6 +10,8 @@ define i32 @test1(i1 %B) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND_US:%.*]]
; CHECK: for.cond.us:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[B:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: br label [[FOR_COND_US]]
;
entry:
@@ -35,4 +37,4 @@ for.cond5: ; preds = %for.cond5, %for.con
for.end: ; preds = %for.cond5
%load = load i32, i32* %call, align 4
br label %for.cond4
-} \ No newline at end of file
+}
diff --git a/llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll b/llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
index 6bb38c3ed88..36b44a25aa8 100644
--- a/llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
+++ b/llvm/test/Transforms/SimplifyCFG/UnreachableEliminate.ll
@@ -4,6 +4,8 @@
define void @test1(i1 %C, i1* %BP) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret void
;
entry:
@@ -62,6 +64,8 @@ T:
define void @test5(i1 %cond, i8* %ptr) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: store i8 2, i8* [[PTR:%.*]], align 8
; CHECK-NEXT: ret void
;
@@ -107,6 +111,8 @@ bb2:
define void @test6(i1 %cond, i8* %ptr) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[COND:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: store i8 2, i8* [[PTR:%.*]], align 8
; CHECK-NEXT: ret void
;
@@ -145,6 +151,8 @@ bb2:
define i32 @test7(i1 %X) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret i32 0
;
entry:
@@ -162,6 +170,8 @@ else:
define void @test8(i1 %X, void ()* %Y) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = xor i1 [[X:%.*]], true
+; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: call void [[Y:%.*]]()
; CHECK-NEXT: ret void
;
@@ -196,4 +206,4 @@ else:
ret void
}
-attributes #0 = { "null-pointer-is-valid"="true" } \ No newline at end of file
+attributes #0 = { "null-pointer-is-valid"="true" }
diff --git a/llvm/test/Transforms/SimplifyCFG/unreachable_assume.ll b/llvm/test/Transforms/SimplifyCFG/unreachable_assume.ll
index cd254e4d05f..e0d1e27a995 100644
--- a/llvm/test/Transforms/SimplifyCFG/unreachable_assume.ll
+++ b/llvm/test/Transforms/SimplifyCFG/unreachable_assume.ll
@@ -1,14 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt %s -simplifycfg -instcombine -S | FileCheck %s
-; TODO: ABS call should be optimized away
define i32 @assume1(i32 %p) {
; CHECK-LABEL: @assume1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[P:%.*]], 0
-; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[P]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i32 [[NEG]], i32 [[P]]
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[P:%.*]], 0
+; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT: ret i32 [[P]]
;
entry:
%cmp = icmp sle i32 %p, 0
@@ -26,10 +24,9 @@ if.end:
define i32 @assume2(i32 %p) {
; CHECK-LABEL: @assume2(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[P:%.*]], 0
-; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[P]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i32 [[NEG]], i32 [[P]]
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[P:%.*]], 0
+; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
+; CHECK-NEXT: ret i32 [[P]]
;
entry:
%cmp = icmp sgt i32 %p, 0
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