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authorValery Pykhtin <Valery.Pykhtin@amd.com>2016-04-05 16:18:16 +0000
committerValery Pykhtin <Valery.Pykhtin@amd.com>2016-04-05 16:18:16 +0000
commit020c29e2b7adb702fd1b2df70b307f123b429378 (patch)
tree330270dd24fea6601ad5c8722014286050924b8d
parent42991b3e5ad397a82e2f0336f608a3f911dfbdc7 (diff)
downloadbcm5719-llvm-020c29e2b7adb702fd1b2df70b307f123b429378.tar.gz
bcm5719-llvm-020c29e2b7adb702fd1b2df70b307f123b429378.zip
[TableGen] AsmMatcherEmitter.cpp: replace a sequence of "if" to "switch" in emitValidateOperandClass.
Differential Revision: http://reviews.llvm.org/D18394 llvm-svn: 265412
-rw-r--r--llvm/utils/TableGen/AsmMatcherEmitter.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index 799f20d0b94..589d81c4eb2 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -2153,19 +2153,23 @@ static void emitValidateOperandClass(AsmMatcherInfo &Info,
// Check the user classes. We don't care what order since we're only
// actually matching against one of them.
+ OS << " switch (Kind) {\n"
+ " default: break;\n";
for (const auto &CI : Info.Classes) {
if (!CI.isUserClass())
continue;
OS << " // '" << CI.ClassName << "' class\n";
- OS << " if (Kind == " << CI.Name << ") {\n";
+ OS << " case " << CI.Name << ":\n";
OS << " if (Operand." << CI.PredicateMethod << "())\n";
OS << " return MCTargetAsmParser::Match_Success;\n";
if (!CI.DiagnosticType.empty())
OS << " return " << Info.Target.getName() << "AsmParser::Match_"
<< CI.DiagnosticType << ";\n";
- OS << " }\n\n";
+ else
+ OS << " break;\n";
}
+ OS << " } // end switch (Kind)\n\n";
// Check for register operands, including sub-classes.
OS << " if (Operand.isReg()) {\n";
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