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author | Tim Northover <tnorthover@apple.com> | 2016-07-05 18:02:57 +0000 |
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committer | Tim Northover <tnorthover@apple.com> | 2016-07-05 18:02:57 +0000 |
commit | 01dff9d18a23ef7d413e6d759e01423e4dae24bb (patch) | |
tree | 54d9eb994fe12bcb981168036edb2f8c4322ee98 | |
parent | f1bd000f7153cf608b050214e42475731188febc (diff) | |
download | bcm5719-llvm-01dff9d18a23ef7d413e6d759e01423e4dae24bb.tar.gz bcm5719-llvm-01dff9d18a23ef7d413e6d759e01423e4dae24bb.zip |
AArch64: use correct SDValue # when looking for bitfield placement.
The other use really does only care about the SDNode (it checks the
opcode against a whitelist), but bitFieldPlacement can be misled if
the node produces multiple results.
Patch by Ismail Badawi.
llvm-svn: 274567
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 5 | ||||
-rw-r--r-- | llvm/test/CodeGen/AArch64/aarch64-tryBitfieldInsertOpFromOr-crash.ll | 36 |
2 files changed, 39 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index fcca120d885..2e98c41f0e7 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -2172,7 +2172,8 @@ static bool tryBitfieldInsertOpFromOr(SDNode *N, const APInt &UsefulBits, SDValue Dst, Src; unsigned ImmR, ImmS; bool BiggerPattern = I / 2; - SDNode *OrOpd0 = N->getOperand(I % 2).getNode(); + SDValue OrOpd0Val = N->getOperand(I % 2); + SDNode *OrOpd0 = OrOpd0Val.getNode(); SDValue OrOpd1Val = N->getOperand((I + 1) % 2); SDNode *OrOpd1 = OrOpd1Val.getNode(); @@ -2197,7 +2198,7 @@ static bool tryBitfieldInsertOpFromOr(SDNode *N, const APInt &UsefulBits, // If the mask on the insertee is correct, we have a BFXIL operation. We // can share the ImmR and ImmS values from the already-computed UBFM. - } else if (isBitfieldPositioningOp(CurDAG, SDValue(OrOpd0, 0), + } else if (isBitfieldPositioningOp(CurDAG, OrOpd0Val, BiggerPattern, Src, DstLSB, Width)) { ImmR = (BitWidth - DstLSB) % BitWidth; diff --git a/llvm/test/CodeGen/AArch64/aarch64-tryBitfieldInsertOpFromOr-crash.ll b/llvm/test/CodeGen/AArch64/aarch64-tryBitfieldInsertOpFromOr-crash.ll new file mode 100644 index 00000000000..3c986ba2e51 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/aarch64-tryBitfieldInsertOpFromOr-crash.ll @@ -0,0 +1,36 @@ +; RUN: llc <%s +target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128" +target triple = "aarch64--linux-gnu" + +; Function Attrs: noreturn nounwind +define void @foo(i32* %d) { +entry: + %0 = ptrtoint i32* %d to i64 + %1 = and i64 %0, -36028797018963969 + %2 = inttoptr i64 %1 to i32* + %arrayidx5 = getelementptr inbounds i32, i32* %2, i64 1 + %arrayidx6 = getelementptr inbounds i32, i32* %2, i64 2 + %arrayidx7 = getelementptr inbounds i32, i32* %2, i64 3 + br label %for.cond + +for.cond: ; preds = %for.cond, %entry + %B.0 = phi i32* [ %d, %entry ], [ %12, %for.cond ] + %3 = ptrtoint i32* %B.0 to i64 + %4 = and i64 %3, -36028797018963969 + %5 = inttoptr i64 %4 to i32* + %6 = load i32, i32* %5, align 4 + %arrayidx1 = getelementptr inbounds i32, i32* %5, i64 1 + %7 = load i32, i32* %arrayidx1, align 4 + %arrayidx2 = getelementptr inbounds i32, i32* %5, i64 2 + %8 = load i32, i32* %arrayidx2, align 4 + %arrayidx3 = getelementptr inbounds i32, i32* %5, i64 3 + %9 = load i32, i32* %arrayidx3, align 4 + store i32 %6, i32* %2, align 4 + store i32 %7, i32* %arrayidx5, align 4 + store i32 %8, i32* %arrayidx6, align 4 + store i32 %9, i32* %arrayidx7, align 4 + %10 = ptrtoint i32* %arrayidx1 to i64 + %11 = or i64 %10, 36028797018963968 + %12 = inttoptr i64 %11 to i32* + br label %for.cond +} |