diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/Config.in | 22 | ||||
| -rw-r--r-- | arch/Config.in.arm | 292 | ||||
| -rw-r--r-- | arch/Config.in.mips | 13 |
3 files changed, 260 insertions, 67 deletions
diff --git a/arch/Config.in b/arch/Config.in index c10bf16809..d3f63da34f 100644 --- a/arch/Config.in +++ b/arch/Config.in @@ -79,6 +79,7 @@ config BR2_aarch64_be config BR2_bfin bool "Blackfin" select BR2_ARCH_HAS_FDPIC_SUPPORT + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 help The Blackfin is a family of 16 or 32-bit microprocessors developed, manufactured and marketed by Analog Devices. @@ -261,6 +262,27 @@ config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT bool default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT +# The following symbols are selected by the individual +# Config.in.$ARCH files +config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8 + bool + +config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 + bool + select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8 + +config BR2_ARCH_NEEDS_GCC_AT_LEAST_5 + bool + select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 + +config BR2_ARCH_NEEDS_GCC_AT_LEAST_6 + bool + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 + +config BR2_ARCH_NEEDS_GCC_AT_LEAST_7 + bool + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 + # The following string values are defined by the individual # Config.in.$ARCH files config BR2_ARCH diff --git a/arch/Config.in.arm b/arch/Config.in.arm index 09916df7ad..85070fbfc9 100644 --- a/arch/Config.in.arm +++ b/arch/Config.in.arm @@ -59,7 +59,7 @@ config BR2_ARM_CPU_ARMV7A config BR2_ARM_CPU_ARMV7M bool -config BR2_ARM_CPU_ARMV8 +config BR2_ARM_CPU_ARMV8A bool choice @@ -68,20 +68,32 @@ choice help Specific CPU variant to use +if !BR2_ARCH_IS_64 +comment "armv4 cores" config BR2_arm920t bool "arm920t" select BR2_ARM_CPU_HAS_ARM select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV4 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_arm922t bool "arm922t" select BR2_ARM_CPU_HAS_ARM select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV4 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 +config BR2_fa526 + bool "fa526/626" + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_ARMV4 + select BR2_ARCH_HAS_MMU_OPTIONAL +config BR2_strongarm + bool "strongarm sa110/sa1100" + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_ARMV4 + select BR2_ARCH_HAS_MMU_OPTIONAL + +comment "armv5 cores" config BR2_arm926t bool "arm926t" select BR2_ARM_CPU_HAS_ARM @@ -89,14 +101,25 @@ config BR2_arm926t select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV5 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 +config BR2_iwmmxt + bool "iwmmxt" + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_ARMV5 + select BR2_ARCH_HAS_MMU_OPTIONAL +config BR2_xscale + bool "xscale" + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_HAS_THUMB + select BR2_ARM_CPU_ARMV5 + select BR2_ARCH_HAS_MMU_OPTIONAL + +comment "armv6 cores" config BR2_arm1136j_s bool "arm1136j-s" select BR2_ARM_CPU_HAS_ARM select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV6 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_arm1136jf_s bool "arm1136jf-s" select BR2_ARM_CPU_HAS_ARM @@ -104,14 +127,12 @@ config BR2_arm1136jf_s select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV6 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_arm1176jz_s bool "arm1176jz-s" select BR2_ARM_CPU_HAS_ARM select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV6 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_arm1176jzf_s bool "arm1176jzf-s" select BR2_ARM_CPU_HAS_ARM @@ -119,7 +140,6 @@ config BR2_arm1176jzf_s select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV6 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_arm11mpcore bool "mpcore" select BR2_ARM_CPU_HAS_ARM @@ -127,7 +147,8 @@ config BR2_arm11mpcore select BR2_ARM_CPU_HAS_THUMB select BR2_ARM_CPU_ARMV6 select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 + +comment "armv7a cores" config BR2_cortex_a5 bool "cortex-A5" select BR2_ARM_CPU_HAS_ARM @@ -136,7 +157,6 @@ config BR2_cortex_a5 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_cortex_a7 bool "cortex-A7" select BR2_ARM_CPU_HAS_ARM @@ -145,7 +165,6 @@ config BR2_cortex_a7 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_cortex_a8 bool "cortex-A8" select BR2_ARM_CPU_HAS_ARM @@ -154,7 +173,6 @@ config BR2_cortex_a8 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_cortex_a9 bool "cortex-A9" select BR2_ARM_CPU_HAS_ARM @@ -163,7 +181,6 @@ config BR2_cortex_a9 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_cortex_a12 bool "cortex-A12" select BR2_ARM_CPU_HAS_ARM @@ -172,7 +189,6 @@ config BR2_cortex_a12 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_cortex_a15 bool "cortex-A15" select BR2_ARM_CPU_HAS_ARM @@ -181,7 +197,6 @@ config BR2_cortex_a15 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 config BR2_cortex_a15_a7 bool "cortex-A15/A7 big.LITTLE" select BR2_ARM_CPU_HAS_ARM @@ -190,7 +205,7 @@ config BR2_cortex_a15_a7 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 config BR2_cortex_a17 bool "cortex-A17" select BR2_ARM_CPU_HAS_ARM @@ -199,7 +214,7 @@ config BR2_cortex_a17 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 config BR2_cortex_a17_a7 bool "cortex-A17/A7 big.LITTLE" select BR2_ARM_CPU_HAS_ARM @@ -208,14 +223,52 @@ config BR2_cortex_a17_a7 select BR2_ARM_CPU_HAS_THUMB2 select BR2_ARM_CPU_ARMV7A select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 +config BR2_pj4 + bool "pj4" + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_HAS_VFPV3 + select BR2_ARM_CPU_ARMV7A + select BR2_ARCH_HAS_MMU_OPTIONAL + +comment "armv7m cores" +config BR2_cortex_m3 + bool "cortex-M3" + select BR2_ARM_CPU_HAS_THUMB2 + select BR2_ARM_CPU_ARMV7M +config BR2_cortex_m4 + bool "cortex-M4" + select BR2_ARM_CPU_HAS_THUMB2 + select BR2_ARM_CPU_ARMV7M +endif # !BR2_ARCH_IS_64 + +comment "armv8 cores" +config BR2_cortex_a32 + bool "cortex-A32" depends on !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_ARM + select BR2_ARM_CPU_HAS_NEON + select BR2_ARM_CPU_HAS_THUMB2 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 +config BR2_cortex_a35 + bool "cortex-A35" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 config BR2_cortex_a53 bool "cortex-A53" select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_FP_ARMV8 - select BR2_ARM_CPU_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL config BR2_cortex_a57 bool "cortex-A57" @@ -223,7 +276,7 @@ config BR2_cortex_a57 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_FP_ARMV8 - select BR2_ARM_CPU_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL config BR2_cortex_a57_a53 bool "cortex-A57/A53 big.LITTLE" @@ -231,66 +284,153 @@ config BR2_cortex_a57_a53 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_FP_ARMV8 - select BR2_ARM_CPU_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 config BR2_cortex_a72 bool "cortex-A72" select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_FP_ARMV8 - select BR2_ARM_CPU_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 config BR2_cortex_a72_a53 bool "cortex-A72/A53 big.LITTLE" select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 select BR2_ARM_CPU_HAS_FP_ARMV8 - select BR2_ARM_CPU_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL -config BR2_cortex_m3 - bool "cortex-M3" - select BR2_ARM_CPU_HAS_THUMB2 - select BR2_ARM_CPU_ARMV7M - depends on !BR2_ARCH_IS_64 -config BR2_cortex_m4 - bool "cortex-M4" - select BR2_ARM_CPU_HAS_THUMB2 - select BR2_ARM_CPU_ARMV7M - depends on !BR2_ARCH_IS_64 -config BR2_fa526 - bool "fa526/626" - select BR2_ARM_CPU_HAS_ARM - select BR2_ARM_CPU_ARMV4 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 +config BR2_cortex_a73 + bool "cortex-A73" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 -config BR2_pj4 - bool "pj4" - select BR2_ARM_CPU_HAS_ARM - select BR2_ARM_CPU_HAS_VFPV3 - select BR2_ARM_CPU_ARMV7A + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_cortex_a73_a35 + bool "cortex-A73/A35 big.LITTLE" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 -config BR2_strongarm - bool "strongarm sa110/sa1100" - select BR2_ARM_CPU_HAS_ARM - select BR2_ARM_CPU_ARMV4 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_cortex_a73_a53 + bool "cortex-A73/A53 big.LITTLE" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 -config BR2_xscale - bool "xscale" - select BR2_ARM_CPU_HAS_ARM - select BR2_ARM_CPU_HAS_THUMB - select BR2_ARM_CPU_ARMV5 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_exynos_m1 + bool "exynos-m1" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 -config BR2_iwmmxt - bool "iwmmxt" - select BR2_ARM_CPU_HAS_ARM - select BR2_ARM_CPU_ARMV5 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 +config BR2_falkor + bool "falkor" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL - depends on !BR2_ARCH_IS_64 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_qdf24xx + bool "qdf24xx" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 +if BR2_ARCH_IS_64 +config BR2_thunderx + bool "thunderx" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 +config BR2_thunderxt81 + bool "thunderxt81" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt83 + bool "thunderxt83" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt88 + bool "thunderxt88" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt88p1 + bool "thunderxt88p1" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +endif # BR2_ARCH_IS_64 +config BR2_xgene1 + bool "xgene1" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 + +if BR2_ARCH_IS_64 +comment "armv8.1a cores" +config BR2_thunderx2t99 + bool "thunderx2t99" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderx2t99p1 + bool "thunderx2t99p1" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_vulcan + bool "vulcan" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +endif # BR2_ARCH_IS_64 endchoice config BR2_ARM_ENABLE_NEON @@ -545,15 +685,23 @@ config BR2_ENDIAN default "BIG" if (BR2_armeb || BR2_aarch64_be) config BR2_GCC_TARGET_CPU + # armv4 default "arm920t" if BR2_arm920t default "arm922t" if BR2_arm922t + default "fa526" if BR2_fa526 + default "strongarm" if BR2_strongarm + # armv5 default "arm926ej-s" if BR2_arm926t + default "iwmmxt" if BR2_iwmmxt + default "xscale" if BR2_xscale + # armv6 default "arm1136j-s" if BR2_arm1136j_s default "arm1136jf-s" if BR2_arm1136jf_s default "arm1176jz-s" if BR2_arm1176jz_s default "arm1176jzf-s" if BR2_arm1176jzf_s default "mpcore" if BR2_arm11mpcore && BR2_ARM_CPU_HAS_VFPV2 default "mpcorenovfp" if BR2_arm11mpcore + # armv7a default "cortex-a5" if BR2_cortex_a5 default "cortex-a7" if BR2_cortex_a7 default "cortex-a8" if BR2_cortex_a8 @@ -563,18 +711,34 @@ config BR2_GCC_TARGET_CPU default "cortex-a15.cortex-a7" if BR2_cortex_a15_a7 default "cortex-a17" if BR2_cortex_a17 default "cortex-a17.cortex-a7" if BR2_cortex_a17_a7 + default "marvell-pj4" if BR2_pj4 + # armv7m default "cortex-m3" if BR2_cortex_m3 default "cortex-m4" if BR2_cortex_m4 - default "fa526" if BR2_fa526 - default "marvell-pj4" if BR2_pj4 - default "strongarm" if BR2_strongarm - default "xscale" if BR2_xscale - default "iwmmxt" if BR2_iwmmxt + # armv8a + default "cortex-a32" if BR2_cortex_a32 + default "cortex-a35" if BR2_cortex_a35 default "cortex-a53" if BR2_cortex_a53 default "cortex-a57" if BR2_cortex_a57 default "cortex-a57.cortex-a53" if BR2_cortex_a57_a53 default "cortex-a72" if BR2_cortex_a72 default "cortex-a72.cortex-a53" if BR2_cortex_a72_a53 + default "cortex-a73" if BR2_cortex_a73 + default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35 + default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53 + default "exynos-m1" if BR2_exynos_m1 + default "falkor" if BR2_falkor + default "qdf24xx" if BR2_qdf24xx + default "thunderx" if BR2_thunderx + default "thunderxt81" if BR2_thunderxt81 + default "thunderxt83" if BR2_thunderxt83 + default "thunderxt88" if BR2_thunderxt88 + default "thunderxt88p1" if BR2_thunderxt88p1 + default "xgene1" if BR2_xgene1 + # armv8.1a + default "thunderx2t99" if BR2_thunderx2t99 + default "thunderx2t99p1" if BR2_thunderx2t99p1 + default "vulcan" if BR2_vulcan config BR2_GCC_TARGET_ABI default "aapcs-linux" if BR2_arm || BR2_armeb diff --git a/arch/Config.in.mips b/arch/Config.in.mips index 1cce1710da..f8e57bab33 100644 --- a/arch/Config.in.mips +++ b/arch/Config.in.mips @@ -7,9 +7,11 @@ config BR2_MIPS_CPU_MIPS32R2 select BR2_MIPS_NAN_LEGACY config BR2_MIPS_CPU_MIPS32R5 bool + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 config BR2_MIPS_CPU_MIPS32R6 bool select BR2_MIPS_NAN_2008 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 config BR2_MIPS_CPU_MIPS64 bool select BR2_MIPS_NAN_LEGACY @@ -18,9 +20,11 @@ config BR2_MIPS_CPU_MIPS64R2 select BR2_MIPS_NAN_LEGACY config BR2_MIPS_CPU_MIPS64R5 bool + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 config BR2_MIPS_CPU_MIPS64R6 bool select BR2_MIPS_NAN_2008 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 choice prompt "Target Architecture Variant" @@ -53,11 +57,13 @@ config BR2_mips_interaptiv bool "interAptiv" depends on !BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS32R2 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 config BR2_mips_m5150 bool "M5150" depends on !BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS32R5 select BR2_MIPS_NAN_2008 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 config BR2_mips_m6250 bool "M6250" depends on !BR2_ARCH_IS_64 @@ -101,6 +107,7 @@ config BR2_mips_i6400 bool "I6400" depends on BR2_ARCH_IS_64 select BR2_MIPS_CPU_MIPS64R6 + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 config BR2_mips_p6600 bool "P6600" depends on BR2_ARCH_IS_64 @@ -139,7 +146,7 @@ config BR2_MIPS_SOFT_FLOAT choice prompt "FP mode" depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT - default BR2_MIPS_FP32_MODE_XX if BR2_TOOLCHAIN_HAS_MFPXX_OPTION + default BR2_MIPS_FP32_MODE_XX help MIPS32 supports different FP modes (32,xx,64). Information about FP modes can be found here: @@ -152,7 +159,7 @@ config BR2_MIPS_FP32_MODE_32 config BR2_MIPS_FP32_MODE_XX bool "xx" - depends on BR2_TOOLCHAIN_HAS_MFPXX_OPTION + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 config BR2_MIPS_FP32_MODE_64 bool "64" @@ -169,10 +176,10 @@ config BR2_MIPS_NAN_LEGACY config BR2_MIPS_NAN_2008 bool + select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9 choice prompt "Target NaN" - depends on BR2_TOOLCHAIN_HAS_MNAN_OPTION depends on BR2_mips_32r5 || BR2_mips_64r5 default BR2_MIPS_ENABLE_NAN_2008 help |
