diff options
| author | Yann E. MORIN <yann.morin.1998@free.fr> | 2017-07-09 11:30:00 +0200 |
|---|---|---|
| committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2017-07-22 23:29:24 +0200 |
| commit | 78c2a9f763de82746c9eb688d8e16400eb2c1730 (patch) | |
| tree | 6ff014d21f03cf2eb6876b0c052222af3fae9a94 /toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in | |
| parent | e734c633875ae22e2baebe0d8e76d6e10686d804 (diff) | |
| download | buildroot-78c2a9f763de82746c9eb688d8e16400eb2c1730.tar.gz buildroot-78c2a9f763de82746c9eb688d8e16400eb2c1730.zip | |
arch/arm: add big.LITTLE cpu variants
The big.LITTLE configurations can be optimised for by gcc, and a few
users wonder what they should choose when they have such CPUs.
Add new entries for those big.LITTLE configurations.
Note: the various combos were added in various gcc versions, but only
really worked in later versions:
Variant | Introduced in | First built in
----------+---------------+----------------
a15-a7 | 4.9 | 4.9
a17-a7 | 5 | 5
a57-a53 | 4.9 | 6
a72-a53 | 5 | 6
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Thomas De Schampheleire <patrickdepinguin@gmail.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in')
| -rw-r--r-- | toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in b/toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in index 6331873dbd..e1a7891007 100644 --- a/toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in +++ b/toolchain/toolchain-external/toolchain-external-codesourcery-arm/Config.in @@ -1,6 +1,10 @@ config BR2_TOOLCHAIN_EXTERNAL_CODESOURCERY_ARM bool "Sourcery CodeBench ARM 2014.05" depends on BR2_arm + # a15/a7 appeared in gcc-4.9, a17/a7 in gcc-5, a57/a53 and a72/a53 + # in gcc-6, or they each were broken earlier than that. + depends on !BR2_cortex_a15_a7 && !BR2_cortex_a17_a7 + depends on !BR2_cortex_a57_53 && !BR2_cortex_a72_53 depends on BR2_HOSTARCH = "x86_64" || BR2_HOSTARCH = "x86" depends on BR2_ARM_EABI # Unsupported ARM cores |
