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| author | Adrien Béraud <adrien.beraud@savoirfairelinux.com> | 2014-01-15 17:17:10 -0500 |
|---|---|---|
| committer | Peter Korsgaard <peter@korsgaard.com> | 2014-01-15 23:19:46 +0100 |
| commit | a20cb386590ac2b6dbb1dac3fdd21eb9462c05a4 (patch) | |
| tree | 06552da7842eb03c3400103b57b4be4f31689e88 /package/gcc | |
| parent | 613c30c85e05de06f97fa860c1bba1d49a00653f (diff) | |
| download | buildroot-a20cb386590ac2b6dbb1dac3fdd21eb9462c05a4.tar.gz buildroot-a20cb386590ac2b6dbb1dac3fdd21eb9462c05a4.zip | |
arch: add support for "jaguar" AMD CPU optimisations
AMD Jaguar ( https://en.wikipedia.org/wiki/Jaguar_%28microarchitecture%29 ) is
suddenly a popular architecture since it is used in the PS4 and the XBox One.
Many embedded systems are also likely to use it in the next years.
This patch adds support for GCC architecture-specific optimisations and
tuning for these CPUs.
These optimizations are available with GCC 4.8+.
Signed-off-by: Adrien Beraud <adrien.beraud@savoirfairelinux.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Diffstat (limited to 'package/gcc')
| -rw-r--r-- | package/gcc/Config.in.host | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/package/gcc/Config.in.host b/package/gcc/Config.in.host index 87543d9311..7bd1eb3f8c 100644 --- a/package/gcc/Config.in.host +++ b/package/gcc/Config.in.host @@ -19,12 +19,12 @@ choice bool "gcc 4.2.2-avr32-2.1.5" config BR2_GCC_VERSION_4_3_X - depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a8 && !BR2_cortex_a9 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_x86_jaguar && !BR2_powerpc_e300c2 && !BR2_powerpc_e300c3 && !BR2_powerpc_e500mc && !BR2_powerpc_464 && !BR2_powerpc_464fp && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 depends on !BR2_ARM_EABIHF bool "gcc 4.3.x" config BR2_GCC_VERSION_4_4_X - depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a5 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_atom && !BR2_x86_jaguar && !BR2_powerpc_476 && !BR2_powerpc_476fp && !BR2_fa526 && !BR2_pj4 bool "gcc 4.4.x" # ARM EABIhf support appeared in gcc 4.6 depends on !BR2_ARM_EABIHF @@ -32,19 +32,19 @@ choice depends on !BR2_ARM_FPU_VFPV4 && !BR2_ARM_FPU_VFPV4D16 config BR2_GCC_VERSION_4_5_X - depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_cortex_a7 && !BR2_cortex_a15 && !BR2_x86_jaguar && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_fa526 && !BR2_pj4 select BR2_GCC_NEEDS_MPC # ARM EABIhf support appeared in gcc 4.6 depends on !BR2_ARM_EABIHF bool "gcc 4.5.x" config BR2_GCC_VERSION_4_6_X - depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a7 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a7 && !BR2_x86_jaguar && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 select BR2_GCC_NEEDS_MPC bool "gcc 4.6.x" config BR2_GCC_VERSION_4_7_X - depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 + depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_x86_jaguar && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8 && !BR2_pj4 select BR2_GCC_NEEDS_MPC bool "gcc 4.7.x" |
