boost: bump to version 1.63.0

Remove getchar() patch which has been applied upstream.

Add recommanded post-release patch from upstream to fix 64-bit atomic
operations on 32-bit x86 with gcc versions older than 4.7.

Add a patch from upstream to fix FPE issue with uClibc-based toolchains.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

1 files changed, 65 insertions, 0 deletions

diff --git a/package/boost/0004-Corrected-register-usage-in-x86-DCAS-asm-blocks.patch b/package/boost/0004-Corrected-register-usage-in-x86-DCAS-asm-blocks.patch
new file mode 100644
index 0000000000..a955c1e2d8
--- /dev/null
+++ b/package/boost/0004-Corrected-register-usage-in-x86-DCAS-asm-blocks.patch
@@ -0,0 +1,65 @@
+From a67cc1b055cf09f371e2eca544884634a1ccc886 Mon Sep 17 00:00:00 2001
+From: Andrey Semashev <andrey.semashev@gmail.com>
+Date: Sun, 8 Jan 2017 18:09:12 +0300
+Subject: [PATCH] Corrected register usage in x86 DCAS asm blocks.
+
+In some of the asm blocks eax was modified as a result of cmpxchg8b but that
+was not reflected in the register constraints. This could cause incorrect code
+being generated.
+
+Fetch from:
+https://github.com/boostorg/atomic/commit/a67cc1b055cf09f371e2eca544884634a1ccc886
+
+[Adjust github patch to tarball release]
+Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
+---
+ boost/atomic/detail/ops_gcc_x86_dcas.hpp | 14 ++++++++------
+ 1 file changed, 8 insertions(+), 6 deletions(-)
+
+diff --git a/boost/atomic/detail/ops_gcc_x86_dcas.hpp b/boost/atomic/detail/ops_gcc_x86_dcas.hpp
+index 2f51182..e356e8c 100644
+--- a/boost/atomic/detail/ops_gcc_x86_dcas.hpp
++++ b/boost/atomic/detail/ops_gcc_x86_dcas.hpp
+@@ -73,6 +73,7 @@ struct gcc_dcas_x86
+         {
+ #if !defined(BOOST_ATOMIC_DETAIL_NO_ASM_IMPLIED_ZERO_DISPLACEMENTS)
+ #if defined(__PIC__)
++            uint32_t v_lo = (uint32_t)v;
+             uint32_t scratch;
+             __asm__ __volatile__
+             (
+@@ -84,8 +85,8 @@ struct gcc_dcas_x86
+                 "1: lock; cmpxchg8b %[dest]\n\t"
+                 "jne 1b\n\t"
+                 "movl %[scratch], %%ebx\n\t"
+-                : [scratch] "=m" (scratch), [dest] "=o" (storage)
+-                : [value_lo] "a" ((uint32_t)v), "c" ((uint32_t)(v >> 32))
++                : [scratch] "=m" (scratch), [dest] "=o" (storage), [value_lo] "+a" (v_lo)
++                : "c" ((uint32_t)(v >> 32))
+                 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "edx", "memory"
+             );
+ #else // defined(__PIC__)
+@@ -103,6 +104,7 @@ struct gcc_dcas_x86
+ #endif // defined(__PIC__)
+ #else // !defined(BOOST_ATOMIC_DETAIL_NO_ASM_IMPLIED_ZERO_DISPLACEMENTS)
+ #if defined(__PIC__)
++            uint32_t v_lo = (uint32_t)v;
+             uint32_t scratch;
+             __asm__ __volatile__
+             (
+@@ -115,11 +117,11 @@ struct gcc_dcas_x86
+                 "jne 1b\n\t"
+                 "movl %[scratch], %%ebx\n\t"
+ #if !defined(BOOST_ATOMIC_DETAIL_NO_ASM_CONSTRAINT_ALTERNATIVES)
+-                : [scratch] "=m,m" (scratch)
+-                : [value_lo] "a,a" ((uint32_t)v), "c,c" ((uint32_t)(v >> 32)), [dest] "D,S" (&storage)
++                : [scratch] "=m,m" (scratch), [value_lo] "+a,a" (v_lo)
++                : "c,c" ((uint32_t)(v >> 32)), [dest] "D,S" (&storage)
+ #else
+-                : [scratch] "=m" (scratch)
+-                : [value_lo] "a" ((uint32_t)v), "c" ((uint32_t)(v >> 32)), [dest] "D" (&storage)
++                : [scratch] "=m" (scratch), [value_lo] "+a" (v_lo)
++                : "c" ((uint32_t)(v >> 32)), [dest] "D" (&storage)
+ #endif
+                 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "edx", "memory"
+             );