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| author | Yann E. MORIN <yann.morin.1998@free.fr> | 2017-09-03 15:17:47 +0200 |
|---|---|---|
| committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2017-11-24 23:30:36 +0100 |
| commit | d632d9e5a984a8da01156f28a2180e344f6a07a7 (patch) | |
| tree | 03dc2e29162bab5f8c04792b1f8ce4dd53085ad2 | |
| parent | e9960da6ec84d0fc4f3d7ef8d9db5b1e29d79358 (diff) | |
| download | buildroot-d632d9e5a984a8da01156f28a2180e344f6a07a7.tar.gz buildroot-d632d9e5a984a8da01156f28a2180e344f6a07a7.zip | |
arch/arm: add some non-cortex armv8a cores
Some need gcc-5, some gcc-6 and some gcc-7.
The thunderx familly does not build in 32-bit mode (gcc complains
that the CPU is unknown, and even gcc master only knows them as
aarch64-only).
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
| -rw-r--r-- | arch/Config.in.arm | 77 |
1 files changed, 77 insertions, 0 deletions
diff --git a/arch/Config.in.arm b/arch/Config.in.arm index 6f189c6ba9..2d6eb99692 100644 --- a/arch/Config.in.arm +++ b/arch/Config.in.arm @@ -332,6 +332,74 @@ config BR2_cortex_a73_a53 select BR2_ARM_CPU_ARMV8A select BR2_ARCH_HAS_MMU_OPTIONAL select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_exynos_m1 + bool "exynos-m1" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 +config BR2_falkor + bool "falkor" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_qdf24xx + bool "qdf24xx" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_6 +if BR2_ARCH_IS_64 +config BR2_thunderx + bool "thunderx" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 +config BR2_thunderxt81 + bool "thunderxt81" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt83 + bool "thunderxt83" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt88 + bool "thunderxt88" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +config BR2_thunderxt88p1 + bool "thunderxt88p1" + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_7 +endif # BR2_ARCH_IS_64 +config BR2_xgene1 + bool "xgene1" + select BR2_ARM_CPU_HAS_ARM if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_NEON if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_THUMB2 if !BR2_ARCH_IS_64 + select BR2_ARM_CPU_HAS_FP_ARMV8 + select BR2_ARM_CPU_ARMV8A + select BR2_ARCH_HAS_MMU_OPTIONAL + select BR2_ARCH_NEEDS_GCC_AT_LEAST_5 endchoice config BR2_ARM_ENABLE_NEON @@ -627,6 +695,15 @@ config BR2_GCC_TARGET_CPU default "cortex-a73" if BR2_cortex_a73 default "cortex-a73.cortex-a35" if BR2_cortex_a73_a35 default "cortex-a73.cortex-a53" if BR2_cortex_a73_a53 + default "exynos-m1" if BR2_exynos_m1 + default "falkor" if BR2_falkor + default "qdf24xx" if BR2_qdf24xx + default "thunderx" if BR2_thunderx + default "thunderxt81" if BR2_thunderxt81 + default "thunderxt83" if BR2_thunderxt83 + default "thunderxt88" if BR2_thunderxt88 + default "thunderxt88p1" if BR2_thunderxt88p1 + default "xgene1" if BR2_xgene1 config BR2_GCC_TARGET_ABI default "aapcs-linux" if BR2_arm || BR2_armeb |
