Turn off debug prints and fix warnings

5 files changed, 30 insertions, 14 deletions

diff --git a/examples/bigfile.vhd b/examples/bigfile.vhd
index cdaf51f..a9624ba 100644
--- a/examples/bigfile.vhd
+++ b/examples/bigfile.vhd
@@ -100,7 +100,6 @@ architecture rtl of bigfile is
   signal q_g_zaq_in_cd : std_logic_vector(3 downto 0);
   signal q_g_style_vfr_dout : std_logic_vector(31 downto 0);
   signal q_g_unzq : std_logic_vector(3 downto 0);
-  -- i
   signal g_n_active : std_logic_vector(31 downto 0);
 
   -- inter
@@ -192,6 +191,8 @@ begin
   g_doutister_proc :
   process(reset, sysclk)
     variable g_dout_w0x0f_v : std_logic_vector(4 downto 0);
+    variable i : integer;
+    variable j : integer;
   begin
     if( reset /= '0' ) then
       g_t_klim_dout                  <= (others => '0');
@@ -323,6 +324,7 @@ begin
  
   lpq_proc :
   process(reset, sysclk)
+    variable i : integer;
   begin
     if( reset /= '0' ) then
       q_g_zaq_in_cd      <= (others => '0');
@@ -383,6 +385,7 @@ begin
   -- also clear
   n_proc :
   process(reset, sysclk)
+    variable i : integer;
   begin
     if( reset /= '0' ) then
       g_n_vfr_dout <= (others => '0');
@@ -424,6 +427,7 @@ begin
   createwerth_vec_proc :
   process( g_n_r_bne_dout, g_e_n_r_dout)
     variable imod8, idiv8 : integer;
+    variable i : integer;
   begin
     for i in 0 to 31 loop
       imod8 := i mod 8;
@@ -451,6 +455,7 @@ begin
   
   create_g_ack_bne_proc :
   process( swe_ed,swe_lv,g_e_z_dout)
+    variable i : integer;
   begin
     for i in 0 to 31 loop
       if( g_e_z_dout(i) = '1') then
diff --git a/examples/dsp.vhd b/examples/dsp.vhd
index 4f139d5..7527936 100644
--- a/examples/dsp.vhd
+++ b/examples/dsp.vhd
@@ -5,7 +5,7 @@ USE IEEE.numeric_std.all;
 
 entity dsp is generic(
   rst_val   : std_logic := '0';
-  thing_size: integer := 201;
+  thing_size: integer := 51;
   bus_width : integer := 24);
     port(
       -- Inputs
diff --git a/src/vhd2vl.y b/src/vhd2vl.y
index 46deefc..0a20896 100644
--- a/src/vhd2vl.y
+++ b/src/vhd2vl.y
@@ -302,10 +302,13 @@ slist *addind(slist *sl){
   return sl;
 }
 
+#define DEBUG_RANGE 0
 slist *addpar_snug(slist *sl, vrange *v){
-  fprintf(stderr,"addpar_snug %d: ", v->sizeval);
-  fslprint(stderr, v->size_expr);
-  fprintf(stderr,"\n");
+  if (DEBUG_RANGE) {
+    fprintf(stderr,"addpar_snug %d: ", v->sizeval);
+    fslprint(stderr, v->size_expr);
+    fprintf(stderr,"\n");
+  }
   if(v->nlo != NULL) {   /* indexes are simple expressions */
     sl=addtxt(sl,"[");
     if(v->nhi != NULL){
@@ -425,7 +428,6 @@ char *strgrab(char*s, size_t len)
 }
 
 /* s1 is the longer string, s2 is the shorter string */
-#define DEBUG_RANGE 1
 char *string_check_diff(char *s1, char *s2)
 {
   size_t llen = strlen(s1);
@@ -1194,11 +1196,11 @@ type        : BIT {
 
 /* using expr instead of simple_expr here makes the grammar ambiguous (why?) */
 vec_range : simple_expr updown simple_expr {
+              char *range_diff = 0;
               $$=new_vrange(tVRANGE);
               $$->nhi=$1->sl;
               $$->nlo=$3->sl;
               $$->sizeval = -1; /* undefined size */
-              char *range_diff = 0;
               /* Here is where we may want to analyze the two expressions to
                * see if they have a simple (possibly constant) difference.
                * For now, here's an option to visualise their data structures.
diff --git a/translated_examples/bigfile.v b/translated_examples/bigfile.v
index ff4e56d..26a3ae3 100644
--- a/translated_examples/bigfile.v
+++ b/translated_examples/bigfile.v
@@ -91,7 +91,7 @@ reg [31:0] q2_g_zaq_in;
 reg [31:0] q3_g_zaq_in;
 reg [3:0] q_g_zaq_in_cd;
 reg [31:0] q_g_style_vfr_dout;
-reg [3:0] q_g_unzq;  // i
+reg [3:0] q_g_unzq;
 wire [31:0] g_n_active;  // inter
 wire [31:0] g_zaq_in_y;
 wire [31:0] g_zaq_in_y_no_dout;
@@ -135,8 +135,10 @@ wire [31:0] g_dout_i;
   // qaz
   assign g_zaq_in_rst_hold = g_style_main_reset_hold_dout;
   // Din 
-  always @(posedge reset, posedge sysclk) begin : P2
+  always @(posedge reset, posedge sysclk) begin : P5
     reg [4:0] g_dout_w0x0f_v;
+    reg [31:0] i;
+    reg [31:0] j;
 
     if((reset != 1'b0)) begin
       g_t_klim_dout <= {32{1'b0}};
@@ -294,7 +296,9 @@ wire [31:0] g_dout_i;
   assign g_sys_in_i = {g_zaq_in_y_no_dout[31:4],(g_style_c_l_dout[3:0] & q_g_zaq_in_cd) | ( ~g_style_c_l_dout[3:0] & g_zaq_in_y_no_dout[3:0])};
   assign g_sys_in_ii = (g_sys_in_i &  ~gwerthernal_style_l_dout) | (gwerthernal_style_u_dout & gwerthernal_style_l_dout);
   assign g_sys_in = g_sys_in_ii;
-  always @(posedge reset, posedge sysclk) begin
+  always @(posedge reset, posedge sysclk) begin : P4
+    reg [31:0] i;
+
     if((reset != 1'b0)) begin
       q_g_zaq_in_cd <= {4{1'b0}};
       q_g_unzq <= {4{1'b1}};
@@ -347,7 +351,9 @@ wire [31:0] g_dout_i;
   assign g_n_active = ((q_g_style_vfr_dout &  ~g_style_vfr_dout) | ( ~q_g_style_vfr_dout & g_style_vfr_dout & g_n_both_qbars_l_dout)) & g_n_l_dout;
   // check for lqq active and set lqq vfr register
   // also clear
-  always @(posedge reset, posedge sysclk) begin
+  always @(posedge reset, posedge sysclk) begin : P3
+    reg [31:0] i;
+
     if((reset != 1'b0)) begin
       g_n_vfr_dout <= {32{1'b0}};
       gwerth <= {32{1'b0}};
@@ -389,8 +395,9 @@ wire [31:0] g_dout_i;
 
   //--
   // Create the Lqq
-  always @(g_n_r_bne_dout, g_e_n_r_dout) begin : P1
+  always @(g_n_r_bne_dout, g_e_n_r_dout) begin : P2
     reg [31:0] imod8, idiv8;
+    reg [31:0] i;
 
     for (i=0; i <= 31; i = i + 1) begin
       imod8 = i % 8;
@@ -414,7 +421,9 @@ wire [31:0] g_dout_i;
   //--
   // Qaz
   assign g_noop = g_n_div_rebeq_dout;
-  always @(swe_ed, swe_lv, g_e_z_dout) begin
+  always @(swe_ed, swe_lv, g_e_z_dout) begin : P1
+    reg [31:0] i;
+
     for (i=0; i <= 31; i = i + 1) begin
       if((g_e_z_dout[i] == 1'b1)) begin
         swe_qaz1[i] <= swe_ed;
diff --git a/translated_examples/dsp.v b/translated_examples/dsp.v
index 24b3626..71e44dd 100644
--- a/translated_examples/dsp.v
+++ b/translated_examples/dsp.v
@@ -17,7 +17,7 @@ output wire [13:0] memdout
 );
 
 parameter rst_val=1'b0;
-parameter [31:0] thing_size=201;
+parameter [31:0] thing_size=51;
 parameter [31:0] bus_width=24;
 // Inputs
 // Outputs