vhdl2vl/examples/Makefile, branch master vhdl2vl https://git.raptorcs.com/git/vhdl2vl/atom?h=master 2017-12-01T16:25:14+00:00 Added unsupported things to todo.vhd 2017-12-01T16:25:14+00:00 Rodrigo Alejandro Melo rmelo@inti.gob.ar 2017-12-01T16:25:14+00:00 urn:sha1:5ac1f1eba35fec83789c635b7b145474a77a5fde Applied a workaround in examples/Makefile to solve a dependency problem. Modified the Makefile to run GHDl and iVerilog always but only if installed 2017-11-17T18:15:54+00:00 Rodrigo Alejandro Melo rmelo@inti.gob.ar 2017-11-17T18:15:54+00:00 urn:sha1:891255b54058e74df28d5c8630d11c86a6333899 The resulting files of the GHDL analysis were moved to temp/vhdl 2017-11-16T15:02:56+00:00 Rodrigo Alejandro Melo rmelo@inti.gob.ar 2017-11-16T15:02:56+00:00 urn:sha1:d1ba84de023c79d6364d31fc81ff843ab53ab5f3 Added analysis of examples with GHDL 2017-02-15T01:01:08+00:00 Rodrigo Alejandro Melo rodrigomelo9@gmail.com 2017-02-13T00:37:55+00:00 urn:sha1:40194fa7f34b2130afe4be5d02b41cd56be0f3a5 Some examples were corrected according GHDL complains. Corresponding traslated_examples were modified. Use of synopsys libraries was removed. Translation of gh_fifo_async16_sr.vhd fails (complains about 'unsigned'). The problem was comented.