| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Enable pullup on secondary CPU presence detect pin | Raptor Engineering Development Team | 2018-06-06 | 1 | -1/+1 |
| | | | | | Bump FPGA version | ||||
| * | Move ATX force enable to I2C register 0x33 | Raptor Engineering Development Team | 2018-05-13 | 1 | -1/+3 |
| | | | | | | | Expose mode select jumper to host Switch ATX PG filter to slower clock source and reduce counter width Bump FPGA version in preparation for release | ||||
| * | Wire second debug jumper as VGA disable, and expose value to hostv1.04 | Raptor Engineering Development Team | 2018-04-14 | 1 | -0/+1 |
| | | | | | Bump revision number reported to 0x07 | ||||
| * | Separate BMC status and chassis reset request lines | Raptor Engineering Development Team | 2018-01-22 | 1 | -0/+3 |
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| * | Remove DD1 VCS overcurrent bug hack | Raptor Engineering Development Team | 2018-01-22 | 1 | -3/+0 |
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| * | Correct polarity of BMC boot complete signal | Raptor Engineering Development Team | 2018-01-17 | 1 | -1/+1 |
| | | | | | Use fading startup pattern instead of prior KR pattern | ||||
| * | Convert combinatorial logic to registered logic to work around apparent ↵ | Raptor Engineering Development Team | 2018-01-12 | 1 | -2/+22 |
| | | | | | | | | | | Yosys bug Add initial internal oscillator Fix license in PCF file Tested to work on initial Talos™ II hardware | ||||
| * | Add initial Talos™ II front panel control logic | Raptor Engineering Development Team | 2017-12-30 | 1 | -1/+25 |
| | | | | | Add initial Talos™ II system control logic | ||||
| * | Initial buildable variant for Talos™ II | Raptor Engineering Development Team | 2017-12-30 | 1 | -0/+76 |
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index : talos-system-fpga | |
| Talos™ II FPGA sources | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
path: root/system_fpga.pcf
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