| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Separate BMC status and chassis reset request lines | Raptor Engineering Development Team | 2018-01-22 | 1 | -0/+3 |
| * | Remove DD1 VCS overcurrent bug hack | Raptor Engineering Development Team | 2018-01-22 | 1 | -3/+0 |
| * | Correct polarity of BMC boot complete signal | Raptor Engineering Development Team | 2018-01-17 | 1 | -1/+1 |
| * | Convert combinatorial logic to registered logic to work around apparent Yosys... | Raptor Engineering Development Team | 2018-01-12 | 1 | -2/+22 |
| * | Add initial Talos™ II front panel control logic | Raptor Engineering Development Team | 2017-12-30 | 1 | -1/+25 |
| * | Initial buildable variant for Talos™ II | Raptor Engineering Development Team | 2017-12-30 | 1 | -0/+76 |
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index : talos-system-fpga | |
| Talos™ II FPGA sources | Raptor Computing Systems |
| summaryrefslogtreecommitdiffstats |
path: root/system_fpga.pcf
|