| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Correct polarity of BMC boot complete signal | Raptor Engineering Development Team | 2018-01-17 | 1 | -8/+38 |
| * | Fix power rails not going offline on system shutdown | Raptor Engineering Development Team | 2018-01-17 | 1 | -2/+2 |
| * | Speed BMC boot pattern up somewhat | Raptor Engineering Development Team | 2018-01-17 | 1 | -2/+2 |
| * | Enable network link and activity LEDs on front and rear panel | Raptor Engineering Development Team | 2018-01-17 | 1 | -12/+77 |
| * | Expose power good/enable busses to I2C for debugging and diagnostic purposes | Raptor Engineering Development Team | 2018-01-16 | 1 | -0/+16 |
| * | Use open drain output on CPU standby reset line | Raptor Engineering Development Team | 2018-01-16 | 1 | -2/+15 |
| * | Take fan controller out of reset when BMC power good is established | Raptor Engineering Development Team | 2018-01-13 | 1 | -2/+2 |
| * | Convert combinatorial logic to registered logic to work around apparent Yosys... | Raptor Engineering Development Team | 2018-01-12 | 1 | -110/+173 |
| * | Add vendor ID registers | Raptor Engineering Development Team | 2017-12-31 | 1 | -3/+22 |
| * | Add initial Talos™ II front panel control logic | Raptor Engineering Development Team | 2017-12-30 | 1 | -12/+101 |
| * | Initial buildable variant for Talos™ II | Raptor Engineering Development Team | 2017-12-30 | 1 | -0/+558 |
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index : talos-system-fpga | |
| Talos™ II FPGA sources | Raptor Computing Systems |
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