talos-system-fpga, branch master Talos™ II FPGA sources https://git.raptorcs.com/git/talos-system-fpga/atom?h=master 2019-07-24T19:54:44+00:00 Bump FPGA version number 2019-07-24T19:54:44+00:00 Raptor Engineering Development Team support@raptorengineering.com 2019-07-24T19:54:44+00:00 urn:sha1:99368dab3befa7014155bcd250a4cf9bbb30b71a Fix poweroff fail for Talos lite 2019-07-24T19:54:27+00:00 Xing Zhao zxingsh@cn.ibm.com 2019-07-24T07:57:26+00:00 urn:sha1:50c947d333476ac8341dd0985d02a77c416c0326 Talos lite has only one socket and unmounted all the components related to the second CPU. False power good of the second CPU's power may casue the system poweroff fail. So gate the power good of the second CPU's power by the present signal of the second CPU. Signed-off-by: Xing Zhao <zxingsh@cn.ibm.com> Bump FPGA version number 2019-05-16T00:59:12+00:00 Raptor Engineering Development Team support@raptorengineering.com 2019-05-16T00:59:12+00:00 urn:sha1:3c62be2df8f4694dce5c39c5e94b78b148e29080 Use onboard oscillator on PCB revision 1.01 and higher 2019-04-30T07:27:06+00:00 Raptor Engineering Development Team support@raptorengineering.com 2019-04-30T04:37:23+00:00 urn:sha1:df7e808365f0cbb8175f7f634dc9bc7a3e3a7443 This breaks compatibility with PCB revision 1.00 Add missing build dependency to README 2019-04-30T04:04:58+00:00 Raptor Engineering Development Team support@raptorengineering.com 2019-04-30T04:04:58+00:00 urn:sha1:ffa5a253cf1c238f037f57e6ab8f8a8c8a14c989 Add initial README.md file 2019-04-29T17:14:53+00:00 Raptor Engineering Development Team support@raptorengineering.com 2019-04-29T17:14:53+00:00 urn:sha1:b8a1e206326e2a0e792f2663cae044ba363b9dbd Add initial pre-PAR simulation framework from internal files 2019-03-14T21:00:11+00:00 Raptor Engineering Development Team support@raptorengineering.com 2019-03-14T21:00:11+00:00 urn:sha1:14ad067f65b45558a513879cf64e039b2212843c Fix regulator test mode 2018-06-14T06:38:44+00:00 Raptor Engineering Development Team support@raptorengineering.com 2018-06-14T06:38:44+00:00 urn:sha1:819d0eb720549fc34a0c9f2a34946fdca04a6a32 Add regulator test mode for manufacturing 2018-06-11T08:00:00+00:00 Raptor Engineering Development Team support@raptorengineering.com 2018-06-11T08:00:00+00:00 urn:sha1:7225267f22a02fa4595ab364862da813392f33a8 Enable pullup on secondary CPU presence detect pin 2018-06-06T05:10:43+00:00 Raptor Engineering Development Team support@raptorengineering.com 2018-06-06T05:10:43+00:00 urn:sha1:74190de14568f3cd50ba9c6d5b626862ad5f7019 Bump FPGA version