| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch adds a new OPAL call OPAL_CEC_REBOOT2 which will
be used to handle abnormal reboot/termination by kernel host.
This call will allow host kernel to pass reboot type and additional
debug data which needs to be captured/saved somewhere (for later
analysis) before going down.
Currently it will support two reboot types (0). normal reboot, that
will behave similar to that of opal_cec_reboot() call, and
(1). platform error reboot, that will trigger a system checkstop
using xscom address and FIR bit information obtained via device-tree
property 'ibm,sw-checkstop-fir'.
For unsupported reboot type, this call will do nothing and return
with OPAL_UNSUPPORTED.
In future, we can overload this call to support additional reboot types.
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Reviewed-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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There are now no users of the call_out parameter and future users should
use the log_append_msg() and log_append_data() functions, so remove all
references to call_out.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Remove the callback functionality from log_error() and replace it with
the ability to append to a user data section, or add addtional user
data sections to an error log.
For multiline or otherwise complex logging the convention is now to call
opal_elog_create() to obtain a errorlog buffer and use log_append_msg()
and log_append_data() to append to the user data section. Additional
user data sections can be added to the error log via log_add_section().
The caller is then responsible for calling log_commit().
For simple logs log_simple_error() takes care of creating and committing
the error log as before.
Signed-off-by: Samuel Mendoza-Jonas <sam.mj@au1.ibm.com>
Reviewed-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Ideally service processor shouldn't request OPAL for SAI state...as this
LED is controlled by service processor itself.
But of some reason its asking OPAL to provide state. Hence handle this
request until FSP team fixes it.
Sample log without this patch:
[77884350335,3] FSPLED: Could not find the location code LC=U8246.L2C.060377A
[77942662287,8] FSPLED: FSP_CMD_GET_LED_LIST command received
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We added led-loc property.. which contains LED location information.
But this property was never used. Also we can make out LED location
(enclosure/component) based on location code (if location code doesn't
contain "-" means its enclosure location code).
As Ben suggested [1], removing this property.
Present code is included in skiboot skiboot-5.0 release..But we don't
have any consumer yet. Hence I think its fine to make this changes.
[1] https://lists.ozlabs.org/pipermail/linuxppc-dev/2015-June/130433.html
Suggested-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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FSP implements the IPMI commands support that can be accessed over
the mailbox interface from the host. The host needs to provide and
receive the message/data bytes of the IPMI command in the TCE space
in the KCS (Keyboard Controller Style) format.
Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Acked-By: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Cc: Alistair Popple <alistair@popple.id.au>
Acked-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Neelesh Gupta <neelegup@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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In phb3_init_rc_cfg(), fix logical operand issue by guarding
p->has_link with brackets.
Fixes Coverity defect#97816.
Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Extend the OPAL call phb3_set_capi_mode to configure CAPP timebase.
Inform Linux with the device tree property "ibm,capp-timebase-sync.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch implements recovery from parity errors on below listed TOD
control registers:
- Master Path control register (0x00040000)
- Primary Port-0 control register (0x00040001)
- Primary Port-1 control register (0x00040002)
- Secondary Port-0 control register (0x00040003)
- Secondary Port-1 control register (0x00040004)
- Slave Path control register (0x00040005)
- Internal Path control register (0x00040006)
- Primary/secondary master/slave control register (0x00040007)
- Chip control register (0x00040010)
To inject TOD register parity error issue:
putscom pu 40031 8000000000000000 -pall # (00040000)
putscom pu 40031 1000000000000000 -pall # (00040001)
putscom pu 40031 0800000000000000 -pall # (00040002)
putscom pu 40031 0400000000000000 -pall # (00040003)
putscom pu 40031 0200000000000000 -pall # (00040004)
putscom pu 40031 0100000000000000 -pall # (00040005)
putscom pu 40031 0080000000000000 -pall # (00040006)
putscom pu 40031 0040000000000000 -pall # (00040007)
putscom pu 40031 0000000080000000 -pall # (00040010)
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Cache chiptod control register values during chiptod initialization and
whenever there is a change in topology configuration. In subsequent patches,
these saved values will be used to recover from parity errors on respective
chiptod control registers.
This patch caches values of following registers:
- Master Path control register (0x00040000)
- Primary Port-0 control register (0x00040001)
- Primary Port-1 control register (0x00040002)
- Secondary Port-0 control register (0x00040003)
- Secondary Port-1 control register (0x00040004)
- Slave Path control register (0x00040005)
- Internal Path control register (0x00040006)
- Primary/secondary master/slave control register (0x00040007)
- Chip control register (0x00040010)
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Whenever FSP makes any changes to backup topology as part of either
routine hardware maintenance or fixing failed backup topology configuration,
it sends out mailbox command xE6, s/c 0x06, mod 0, to enable/disable
the backup topology. OPAL layer should keep itself up-to-date with accurate
details of current topology configurations. This will help OPAL layer to
successfully handle any TOD failover in future.
The FSP can only request that the currently inactive (backup) topology be
disabled or enabled. If the requested topology is currently the active
topology, then fail this request with a 0xB8 (TOD topology in use) status
as return code.
For disable request, set the backup topology status as disabled.
For enable request, scan all the available chips and find the new backup
master chip by looking at TOD status register of each chip.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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After the topology switch, we may have a non-functional backup topology.
This means, we won't be able to recover from future TOD errors that
requires topology switch. Someone needs to either fix it OR configure
new functional backup topology.
Bit 18 of the Pervasive local FIR (SCOM: EH.TPCHIP.TPC.LOCAL_FIR: 0x0104000C)
is used to signal that TOD error analysis needs to be performed. This
allows FSP/PRD to investigate and re-configure new backup topology if
required. Once new backup topology is configured and ready, FSP sends a
mailbox command xE6, s/c 0x06, mod 0, to enable the backup topology.
This isn't documented anywhere. This info is provided by FSP folks.
This patch implements setting of bit 18 in Pervasive local FIR. The next
patch will handle FSP mailbox command xE6, s/c 0x06, mod 0.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Check if backup chip TOD is valid and enabled before we trigger
topology switch.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The current code does not correctly identify need for topology switch and
forces the TOD topology switch even when it is not required do so.
This patch introduces a check to find out if sync/step network is running
and there is no step check error reported on active master. If this check
fails, then we need to trigger a topology switch to recover from TOD error.
But before triggering topology switch, make sure that all slave chip TODs
are stopped except backup master chip. During the topology switch step
checkers are disabled and stays disabled even after the switch. This
causes future step check errors to go undetected. Hence, make sure that
step checkers are enabled on all TODs after topology switch.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The current implementation fails to recover from TOD error on slave chip
where TOD on active master is also stopped due to an error.
This patch improves the TOD recovery for slave chip TODs. Below are the
steps for TOD recovery on slave chips:
a. HMI received on slave chip TOD (e.g. chipS).
b. Check if TOD is running on active master. If yes, jump to step (e).
c. TOD on active master is not running. Scan through all neighboring
chips and identify one (e.g. chipX) that has TOD in running state.
d. Enable TTYPE-4 mode on 'chipX' so that it would respond to TTYPE-3
request from another chip.
e. Move 'chipS' TOD into 'Not-set' mode.
f. Issue TTYPE-3 request from 'chipS' to request TOD value from another
chipTOD.
g. TOD from 'chipS' will receive TOD value from 'chipX' OR from active master.
h. Check if TOD on 'chipS' is moved to 'running' state. if yes, then return
success else return failure.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Modify chiptod_running_check() function to take chip id as argument.
The subsequent patches will use this.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Introduce a function to check sync/step network status for a given topology.
During chiptod initialization, check sync/step network status for backup
topology to find out whether backup topology is enabled or disabled and
update the topology info accordingly.
In the subsequent patches this function will also be used for one of the
checks to detect whether topology switch is required for TOD failure
recovery.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Query and update chip TOD status for both topologies. This helps to
identify which chip TOD is active master and which one is backup master.
During TOD error recovery this information will become very useful.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This patch introduces a topology config structure that holds enough
information related to both (primary and secondary) TOD topologies.
Currently this patch populates chip id and chip role for a given topology.
The subsequent patches is going to use this information to improve TOD
topology failover recovery.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Query for TOD topology currently in use during opal initialization.
The first 3 bits of TOD status register (0x08) tells the topology that
is active and in use currently.
TOD status(0x00040008)[0-2]: 0b000 = primary, 0b111 = secondary
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
[stewart@linux.vnet.ibm.com: also add support for printing Unknown topology]
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Fun-sized version of the MXxxL25635F.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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To avoid possible XSCOM collisions
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Based on HostBoot, recovers from bad XSCOM addresses
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adapts a bunch of code from HostBoot to better handle (and recover
from) FSI Master errors.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Move the various base addresses etc... in a per-instance struct mfsi
which simplifies the code and will make it easier to add subsequent
error handling improvements.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Don't consider hMFSI bits when using cMFSI or vice-versa, properly
reset the PIB2OPB bridge etc..
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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It may or may not already contain the right error code (it can be
used internally by the state machine to carry the error accross the
recovery state), but in case where it's not, update it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The Centaur i2c differs from the main P8 one two ways:
- It doesn't have interrupts, we need to always use polling
- There is a sensor cache for use by the OCC that regularly generates
i2c transactions in HW on that bus. It needs to be disabled before we
can perform i2c accesses and re-enabled later.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The i2c driver will need to use them to avoid conflicts between
i2c accesses initiated by the host and by the sensor cache.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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They will be used by the i2c driver
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Add a new class of message definition OPAL_MSG_OCC to
opal_message_type to notify the following OCC events to host:
1) OCC Reset
2) OCC Load
3) OCC Throttle Status Change
Add an opal poller to periodically read throttle status updated by OCC
for each chip and notify any change in throttle status to host. The
throttle status indicates the reason why OCC may have limited the max
Pstate of the chip.
Signed-off-by: Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>
Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adds a driver for standard CMOS RTC chips and use it from
the QEMU platform.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We will soon expose the dequeue message function which deletes
previously queued messages from the message queue. It could help catch
a few bugs by doing some extra checks.
Signed-off-by: Alistair Popple <alistair@popple.id.au>
Reviewed-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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The last M64 (64-bits MMIO) BAR is always enabled and it is equal
to the PHB's M64 window. Also, the BAR is split to 256 segments
and each PE will have one segment in it. However, the VF PE takes
another BAR other than the last one to accomodate its M64 resources.
So current code will always give wrong M64 base address and size
when injecting M64 error for specified VF PE.
In order to fix the issue, we have to recognize the type of the
target PE: (A) bus dependent or (B) PCI device (VF) dependent.
For (A), we figure out the M64 base address and length from the
last M64 BAR. For (B), we scan from BAR#0 to BAR#14 and first
hit wins.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Before the SRIOV is enabled, the only supported PE type is PCI bus
dependent PE when doing error injection via PCI config space. That
means the device/function number are ignored when writing to PAPR
error injection address/mask registers (0x2b8 and 0x2c0) to inject
PCI config access caused errors. If user intends to inject error
to one VF, which is binding with individual PE, all VFs hooked to
same PCI bus might receive errors wrongly.
The patch fixes above issue by writing correct PCI config address
to the registers according to the PE type: bus dependent or PCI
device dependent PE.
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When enabling (x+1) VFs on Mellanox adapter after disabling its
SRIOV capability, which has been enabled with (x) VFs. We might
hit EEH error caused by bogus PE number in RTC. The reason how
the bogus PE number shows up in RTC isn't known yet. The patch
to invalidate the entire RTC on updating RTT, as workaround,
helps avoiding the problem:
# lspci -s 0002:01:00.0
0002:01:00.0 Ethernet controller: Mellanox Technologies \
MT27500 Family [ConnectX-3]
BZ: 125893
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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When one RID is unmapped from its corresponding PE# as requested by OS,
the reserved PE#, which is PE#0, should be picked to cover the RID.
The patch fixes the wrong reserved PE# for PHB3.
BZ: 125893
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Fix trivial typos
'messasge' -> 'message'
'resposne' -> 'response'
'intialized' -> 'initialized'
One of them, is in the log message.
Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Updated opal-messages.txt with description of OPAL EPOW and DPO messages
Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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struct led_set_cmd cmd is zalloc. While doing strncpy of
loc_code to cmd->loc_code, there are chances of cmd->loc_code
being unterminated. Fix the issue by copying LOC_CODE_SIZE - 1.
Fixes Coverity defect #100249.
Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Vasant Hegde <hegdevasant@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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p7ioc_phb->{tve_hi_cache, tve_hi_cache} are array with upper bound
of 128. In p7ioc_map_pe_dma_window(), we check if the range is 1..255,
which might overrun the array.
Fix it by checking for array index not greater than 127.
Fixes Coverity Defect#97847.
Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Fix uninitialized variable warning in p7ioc_err_inject_io32().
Fixes Coverity defect #97880
Signed-off-by: Kamalesh Babulal <kamalesh@linux.vnet.ibm.com>
Reviewed-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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We have problem with some Mellanox cards
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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This was useful in development when were diagnosing BMC issues. It's
just noisy now, so drop it.
We still print out the SEL received with the command and netfn as this
may be useful in diagnosing failed reboots and power offs in the future.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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This adds support for the HW SerIRQ deserializer of the P8 LPC
bridge which is properly wired up on Naples. It also adds support
for detecting and reporting LPC error interrupts on all P8s.
On most platforms (Rhesus is the exception here due to the way it
lets Linux handle the UART interrupts directly), we modify the
device-tree to properly represent the LPC controller as a cascaded
interrupt-controller and the "interrupts" property of LPC devices
to contain the actual LPC interrupt number for the device.
We add a mechanism for drivers to register specific LPC interrupts,
and a "workaround" for pre-Naples P8 which platforms can use to call
all of them for when the external FPGA based deserializer is used.
There's also a callback on LPC resets which isn't used yet, we need
a bit more work on the general LPC error handling, but it can be
done a separate patches.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com>
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