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<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: src/test/testcases/testQuiesce.xml $                          -->
<!--                                                                        -->
<!-- OpenPOWER sbe Project                                                  -->
<!--                                                                        -->
<!-- Contributors Listed Below - COPYRIGHT 2016                             -->
<!--                                                                        -->
<!--                                                                        -->
<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
<!-- you may not use this file except in compliance with the License.       -->
<!-- You may obtain a copy of the License at                                -->
<!--                                                                        -->
<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
<!--                                                                        -->
<!-- Unless required by applicable law or agreed to in writing, software    -->
<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
<!-- implied. See the License for the specific language governing           -->
<!-- permissions and limitations under the License.                         -->
<!--                                                                        -->
<!-- IBM_PROLOG_END_TAG                                                     -->
<?xml version="1.0" encoding="UTF-8"?>

      <!-- SBE Quiesce Test case -->
      <testcase>
          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testQuiesce.py</simcmd>
          <exitonerror>yes</exitonerror>
      </testcase>
      <!-- A Get Capabilities chip-op should succeed post the Quiesce  -->
      <testcase>
          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testGetCapabilities.py</simcmd>
          <exitonerror>yes</exitonerror>
      </testcase>
      <!-- A GetScom/PutScom chip-op should succeed post the Quiesce  -->
      <testcase>
          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testPutGetScom.py</simcmd>
          <exitonerror>yes</exitonerror>
      </testcase>
      <!-- An Adu put chip-op should succeed post the Quiesce  -->
      <testcase>
          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testAduMem_noEccNoItag.py</simcmd>
          <exitonerror>yes</exitonerror>
      </testcase>
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