/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
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/* $Source: src/sbefw/sbecmdmpipl.H $                                     */
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/* OpenPOWER sbe Project                                                  */
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/* Contributors Listed Below - COPYRIGHT 2016                             */
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/* Licensed under the Apache License, Version 2.0 (the "License");        */
/* you may not use this file except in compliance with the License.       */
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/*     http://www.apache.org/licenses/LICENSE-2.0                         */
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/* IBM_PROLOG_END_TAG                                                     */
/*
 * @file: ppe/src/sbefw/sbecmdmpipl.H
 *
 * @brief This file contains the Interfaces for MPIPL chip-ops
 *
 */

#ifndef __SBEFW_SBECMDMPIPL_H
#define __SBEFW_SBECMDMPIPL_H

#include <stdint.h>

/**
  * @brief  Handles Sbe Enter Mpipl chip-op (0xA901)
  *
  * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
  *
  * @return    Rc from the FIFO access utility
  */
uint32_t sbeEnterMpipl(uint8_t *i_pArg);

/**
  * @brief  Handles Sbe Continue Mpipl chip-op (0xA902)
  *
  * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
  *
  * @return    Rc from the FIFO access utility
  */
uint32_t sbeContinueMpipl(uint8_t *i_pArg);

/**
  * @brief  Handles Sbe Stop Clocks chip-op (0xA903)
  *
  * @param[in] i_pArg Buffer to be passed to the function (not used as of now)
  *
  * @return    Rc from the FIFO access utility
  */
uint32_t sbeStopClocks(uint8_t *i_pArg);

#endif /* __SBEFW_SBECMDMPIPL_H */