ATTR_CHIP_EC_FEATURE_CORE_TRACE_SCOMABLE TARGET_TYPE_PROC_CHIP Returns true if the core trace arrays are dumpable via SCOM. Nimbus EC 0x20 or greater ENUM_ATTR_NAME_NIMBUS 0x20 GREATER_THAN_OR_EQUAL ATTR_CHIP_EC_FEATURE_TEST1 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP Returns if a chip contains the TEST1 feature. True if either: Centaur EC 10 Cumulus EC greater than 30 ENUM_ATTR_NAME_CENTAUR 0x10 EQUAL ENUM_ATTR_NAME_CUMULUS 0x30 GREATER_THAN ATTR_CHIP_EC_FEATURE_TEST2 TARGET_TYPE_PROC_CHIP, TARGET_TYPE_MEMBUF_CHIP Returns if a chip contains the TEST2 feature. True if: Murano EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_VITL_CLK_SETUP TARGET_TYPE_PROC_CHIP Nimbus DD1 for differentiating present/functional targets. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE TARGET_TYPE_PROC_CHIP DD1 attribute for assigning flushvalues to root_ctrl and perv_ctrl registers. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE TARGET_TYPE_PROC_CHIP DD1 update : Flush mode not initiated for N3. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_SDISN_SETUP TARGET_TYPE_PROC_CHIP Sdis_n set or clear : flushing LCBES condition woraround. True if: Nimbus EC less than 20 ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN ATTR_CHIP_EC_FEATURE_VITL_CLOCK_GATING TARGET_TYPE_PROC_CHIP DD1 only: disable local clock gating VITAL. This is used by the procedure for p9_sbe_tp_chiplet_init1 and p9_Sbe_chiplet_reset. ENUM_ATTR_NAME_NIMBUS 0x20 LESS_THAN