/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_enable_ridi.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ /* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ /* You may obtain a copy of the License at */ /* */ /* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ /* Unless required by applicable law or agreed to in writing, software */ /* distributed under the License is distributed on an "AS IS" BASIS, */ /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ /* implied. See the License for the specific language governing */ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ //------------------------------------------------------------------------------ /// @file p9_sbe_tp_enable_ridi.C /// /// @brief This is a method stub, the real functionality has been moved to /// p9_sbe_nest_enable_ridi.C //------------------------------------------------------------------------------ // *HWP HW Owner : Abhishek Agarwal // *HWP HW Backup Owner : Srinivas V Naga // *HWP FW Owner : sunil kumar // *HWP Team : Perv // *HWP Level : 3 // *HWP Consumed by : SBE //------------------------------------------------------------------------------ //## auto_generated #include "p9_sbe_tp_enable_ridi.H" #include "p9_perv_scom_addresses.H" fapi2::ReturnCode p9_sbe_tp_enable_ridi(const fapi2::Target& i_target_chip) { // outside of Cronus cache contained mode, this function is now a stub, // functionality for the mainline IPL has been moved to p9_sbe_nest_enable_ridi.C #ifndef __PPE_ fapi2::buffer l_data64; uint8_t l_system_ipl_phase; FAPI_DBG("Entering ..."); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, fapi2::Target(), l_system_ipl_phase), "Error from FAPI_ATTR_GET (ATTR_SYSTEM_IPL_PHASE)"); if (l_system_ipl_phase == fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED) { FAPI_INF("Enable Recievers, Drivers DI1 & DI2"); //Setting ROOT_CTRL1 register value FAPI_TRY(fapi2::getScom(i_target_chip, PERV_ROOT_CTRL1_SCOM, l_data64)); l_data64.setBit<19>(); //PIB.ROOT_CTRL1.TP_RI_DC_B = 1 l_data64.setBit<20>(); //PIB.ROOT_CTRL1.TP_DI1_DC_B = 1 l_data64.setBit<21>(); //PIB.ROOT_CTRL1.TP_DI2_DC_B = 1 FAPI_TRY(fapi2::putScom(i_target_chip, PERV_ROOT_CTRL1_SCOM, l_data64)); FAPI_DBG("Exiting ..."); } fapi_try_exit: #endif return fapi2::current_err; }