/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ /* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ /* You may obtain a copy of the License at */ /* */ /* http://www.apache.org/licenses/LICENSE-2.0 */ /* */ /* Unless required by applicable law or agreed to in writing, software */ /* distributed under the License is distributed on an "AS IS" BASIS, */ /* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ /* implied. See the License for the specific language governing */ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ /// /// @file p9_hcd_cache_initf.C /// @brief EX (non-core) scan init /// /// Procedure Summary: /// Initfiles in procedure defined on VBU ENGD wiki /// Check for the presence of cache FUNC override rings from image; /// if found, apply; if not, apply cache base FUNC rings from image /// Note: FASTINIT ring (eg CMSK ring) is setup at this point to limit the /// stumps that participate in FUNC ring scanning (this is new for P9). /// (need to make sure the image build support is in place) /// Note: all caches that are in the Cache Multicast group will be /// initialized to the same values via multicast scans // *HWP HWP Owner : David Du // *HWP Backup HWP Owner : Greg Still // *HWP FW Owner : Sangeetha T S // *HWP Team : PM // *HWP Consumed by : SBE:SGPE // *HWP Level : 2 //------------------------------------------------------------------------------ // Includes //------------------------------------------------------------------------------ #include "p9_hcd_cache_initf.H" #include #include //------------------------------------------------------------------------------ // Procedure: EX (non-core) scan init //------------------------------------------------------------------------------ fapi2::ReturnCode p9_hcd_cache_initf( const fapi2::Target& i_target) { FAPI_INF(">>p9_hcd_cache_initf"); #ifndef __PPE__ const fapi2::Target l_sys; uint8_t l_attr_system_ipl_phase; uint8_t l_attr_runn_mode; fapi2::buffer l_data64; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, l_sys, l_attr_system_ipl_phase)); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_RUNN_MODE, l_sys, l_attr_runn_mode)); #endif FAPI_DBG("Scan eq_fure ring"); FAPI_TRY(fapi2::putRing(i_target, eq_fure), "Error from putRing (eq_fure)"); FAPI_DBG("Scan eq_ana_func ring"); FAPI_TRY(fapi2::putRing(i_target, eq_ana_func), "Error from putRing (eq_ana_func)"); for (auto& l_ex_target : i_target.getChildren()) { FAPI_DBG("Scan ex_l2_fure ring"); FAPI_TRY(fapi2::putRing(l_ex_target, ex_l2_fure), "Error from putRing (ex_l2_fure)"); FAPI_DBG("Scan ex_l2_mode ring"); FAPI_TRY(fapi2::putRing(l_ex_target, ex_l2_mode), "Error from putRing (ex_l2_mode)"); FAPI_DBG("Scan ex_l3_fure ring"); FAPI_TRY(fapi2::putRing(l_ex_target, ex_l3_fure), "Error from putRing (ex_l3_fure)"); #ifndef __PPE__ if (l_attr_system_ipl_phase == fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED) { FAPI_DBG("Cache contained: Skipping ex_l3_refr ring scan"); } else { #endif FAPI_DBG("Scan ex_l3_refr_fure ring"); FAPI_TRY(fapi2::putRing(l_ex_target, ex_l3_refr_fure), "Error from putRing (ex_l3_refr_fure)"); #ifndef __PPE__ } #endif } #ifndef __PPE__ if (l_attr_system_ipl_phase == fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED) { if (l_attr_runn_mode) { FAPI_DBG("RUN-N mode drop fences for clock sync"); l_data64.flush<0>(); l_data64.setBit<3>(); l_data64.setBit<4>(); l_data64.setBit<5>(); l_data64.setBit<10>(); l_data64.setBit<11>(); l_data64.setBit<14>(); FAPI_TRY(putScom(i_target, EQ_CPLT_CTRL1_CLEAR, l_data64)); } } #endif fapi_try_exit: FAPI_INF("<