/* IBM_PROLOG_BEGIN_TAG                                                   */
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/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.H $ */
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/* OpenPOWER sbe Project                                                  */
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/* [+] International Business Machines Corp.                              */
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/* IBM_PROLOG_END_TAG                                                     */
//------------------------------------------------------------------------------
/// @file  p9_hcd_cache_chiplet_l3_dcc_setup.H
///
/// @brief Setup L3 DCC, Drop L3 DCC bypass
//------------------------------------------------------------------------------
// *HWP HW Owner        : Anusha Reddy Rangareddygari <anusrang@in.ibm.com>
// *HWP HW Backup Owner : Srinivas V Naga <srinivan@in.ibm.com>
// *HWP FW Owner        : Sunil Kumar <skumar8j@in.ibm.com>
// *HWP Team            : Perv
// *HWP Consumed by     : SBE:SGPE
// *HWP Level           : 3
//------------------------------------------------------------------------------


#ifndef _P9_HCD_CACHE_CHIPLET_L3_DCC_SETUP_H_
#define _P9_HCD_CACHE_CHIPLET_L3_DCC_SETUP_H_


#include <fapi2.H>


typedef fapi2::ReturnCode (*p9_hcd_cache_chiplet_l3_dcc_setup_FP_t)(
    const fapi2::Target<fapi2::TARGET_TYPE_EQ>&);

/// @brief * Setup L3 DCC (scan with setpulse, scan region = ANEP), attribute dependency Nimbus/Cumulus
/// * Drop L3 DCC bypass
///
/// @param[in]     i_target_chiplet   Reference to TARGET_TYPE_EQ target
/// @return  FAPI2_RC_SUCCESS if success, else error code.
extern "C"
{
    fapi2::ReturnCode p9_hcd_cache_chiplet_l3_dcc_setup(const
            fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target_chiplet);
}

#endif