/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: chips/p9/procedures/hwp/perv/p9_sbe_gear_switcher.H $ */ /* */ /* IBM CONFIDENTIAL */ /* */ /* EKB Project */ /* */ /* COPYRIGHT 2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* The source code for this program is not published or otherwise */ /* divested of its trade secrets, irrespective of what has been */ /* deposited with the U.S. Copyright Office. */ /* */ /* IBM_PROLOG_END_TAG */ //------------------------------------------------------------------------------ /// @file p9_sbe_gear_switcher.H /// /// @brief Modules for I2C Bit rate divisor setting /// And stop sequence on I2C //------------------------------------------------------------------------------ // *HWP HW Owner : Abhishek Agarwal // *HWP HW Backup Owner : Srinivas V Naga // *HWP FW Owner : sunil kumar // *HWP Team : Perv // *HWP Level : 2 // *HWP Consumed by : SBE //------------------------------------------------------------------------------ #ifndef _P9_SBE_GEAR_SWITCHER_H_ #define _P9_SBE_GEAR_SWITCHER_H_ #include fapi2::ReturnCode p9_sbe_gear_switcher_apply_i2c_bit_rate_divisor_setting( const fapi2::Target& i_target_chip); fapi2::ReturnCode p9_sbe_gear_switcher_i2c_stop_sequence( const fapi2::Target& i_target_chip); #endif