/* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ /* $Source: chips/p9/procedures/hwp/perv/p9_sbe_check_master.H $ */ /* */ /* IBM CONFIDENTIAL */ /* */ /* EKB Project */ /* */ /* COPYRIGHT 2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ /* The source code for this program is not published or otherwise */ /* divested of its trade secrets, irrespective of what has been */ /* deposited with the U.S. Copyright Office. */ /* */ /* IBM_PROLOG_END_TAG */ //------------------------------------------------------------------------------ /// @file p9_sbe_check_master.H /// /// @brief Deremine if this is master SBE -- External FSI/GP bitIf master continue, else enable runtime chipOps // *! // *! OWNER NAME : Abhishek Agarwal Email: abagarw8@in.ibm.com // *! BACKUP NAME : Email: //------------------------------------------------------------------------------ // *HWP HWP Owner : Abhishek Agarwal // *HWP FW Owner : Brian Silver // *HWP Team : Perv // *HWP Level : 1 // *HWP Consumed by : SBE //------------------------------------------------------------------------------ #ifndef _P9_SBE_CHECK_MASTER_H_ #define _P9_SBE_CHECK_MASTER_H_ #include typedef fapi2::ReturnCode (*p9_sbe_check_master_FP_t)(const fapi2::Target&); /// @brief If master continue, else enable runtime chipOps /// /// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target /// @return FAPI2_RC_SUCCESS if success, else error code. extern "C" { fapi2::ReturnCode p9_sbe_check_master(const fapi2::Target& i_target_chip); } #endif