From d7508dcad4393e82b3e5a9a3a450f86749b77463 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Fri, 27 Jul 2018 15:08:53 -0500 Subject: Updates to permit synchronized SS PLL spreading via TOD Create EC feature attribute and user override attribute to control application of synchronized spreading. Default to enable synchronized spreading on Axone only. p9_sbe_npll_setup Conditionally skip existing unsynchronized spread enablement p9_tod_init Conditionally invoke spread sync routine after TOD network is running p9_ss_pll_sync Remove from repository, shift code into p9_tod_init to prevent need for mirroring into downstream repositories for FW consumption Change-Id: Ic32c800d58c260136b45fe9561989987d0a97ceb Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63494 Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: PPE CI Reviewed-by: Joachim Fenkes Reviewed-by: Daniel M. Crowell Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63503 Reviewed-by: Sachin Gupta --- .../p9/procedures/hwp/perv/p9_sbe_npll_setup.C | 51 ++++++++++++++++------ .../xml/attribute_info/chip_ec_attributes.xml | 17 ++++++++ .../xml/attribute_info/p9_sbe_attributes.xml | 8 ++++ .../xml/attribute_info/pervasive_attributes.xml | 14 ++++++ 4 files changed, 76 insertions(+), 14 deletions(-) (limited to 'src') diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C index 267d2883..2e19c7aa 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C @@ -117,22 +117,9 @@ fapi2::ReturnCode p9_sbe_npll_setup(const .set_MASTER_CHIP(i_target_chip) .set_SS_PLL_READ(l_read_reg) .set_AFTER_SPREAD_ENABLE(false), - "ERROR:SS PLL LOCK NOT SET BEFORE ENABLING SPREAD SPECTRUM"); + "ERROR:SS PLL LOCK NOT SET"); FAPI_TRY(enable_spread_spectrum_via_tod(i_target_chip)); - fapi2::delay(NS_DELAY, SIM_CYCLE_DELAY); - - FAPI_DBG("check SS PLL lock again after enabling spread spectrum"); - //Getting PLL_LOCK_REG register value - FAPI_TRY(fapi2::getScom(i_target_chip, PERV_TP_PLL_LOCK_REG, - l_read_reg)); //l_read_reg = PERV.PLL_LOCK_REG - - FAPI_ASSERT(l_read_reg.getBit<0>(), - fapi2::SS_PLL_LOCK_ERR() - .set_MASTER_CHIP(i_target_chip) - .set_SS_PLL_READ(l_read_reg) - .set_AFTER_SPREAD_ENABLE(true), - "ERROR:SS PLL LOCK NOT SET AFTER ENABLING SPREAD SPECTRUM"); FAPI_DBG("Release SS PLL Bypass"); //Setting ROOT_CTRL8 register value @@ -360,6 +347,27 @@ static fapi2::ReturnCode enable_spread_spectrum_via_tod( const fapi2::Target& i_target_chip) { fapi2::buffer l_data; + uint8_t l_sync_spread = 0; + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FORCE_SYNC_SS_PLL_SPREAD, + fapi2::Target(), + l_sync_spread), + "Error from FAPI_ATTR_GET (ATTR_FORCE_SYNC_SS_PLL_SPREAD)"); + + if (l_sync_spread) + { + goto fapi_try_exit; + } + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD, + i_target_chip, + l_sync_spread), + "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD)"); + + if (l_sync_spread) + { + goto fapi_try_exit; + } FAPI_DBG("Enable Spread Spectrum via TOD"); @@ -385,6 +393,21 @@ static fapi2::ReturnCode enable_spread_spectrum_via_tod( .set_TOD_TIMER_REG(l_data), "Spread Spectrum enable signal not set"); + fapi2::delay(NS_DELAY, SIM_CYCLE_DELAY); + + FAPI_DBG("check SS PLL lock again after enabling spread spectrum"); + //Getting PLL_LOCK_REG register value + FAPI_TRY(fapi2::getScom(i_target_chip, + PERV_TP_PLL_LOCK_REG, + l_data)); + + FAPI_ASSERT(l_data.getBit<0>(), + fapi2::SS_PLL_LOCK_ERR() + .set_MASTER_CHIP(i_target_chip) + .set_SS_PLL_READ(l_data) + .set_AFTER_SPREAD_ENABLE(true), + "ERROR:SS PLL LOCK NOT SET AFTER ENABLING SPREAD SPECTRUM"); + fapi_try_exit: return fapi2::current_err; } diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 95cf7b08..77b0979f 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -7741,4 +7741,21 @@ + + ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD + TARGET_TYPE_PROC_CHIP + + Use TOD to synchronize SS filter PLL spreading across system + + + + ENUM_ATTR_NAME_AXONE + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index ee4a676b..64d77a1e 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -597,6 +597,14 @@ attribute tank ATTR_PROC_MEM_TO_USE 0x00 + + ATTR_FORCE_SYNC_SS_PLL_SPREAD + 0x00 + + + ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD + + ATTR_EXECUTION_PLATFORM diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 515facbb..12028234 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -164,6 +164,20 @@ + + ATTR_FORCE_SYNC_SS_PLL_SPREAD + TARGET_TYPE_SYSTEM + + Use TOD to synchronize SS filter PLL spreading across system, + overriding ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD + + uint8 + + + + + + ATTR_OB0_PLL_BUCKET TARGET_TYPE_PROC_CHIP -- cgit v1.2.1