From cc5c3a7b068c9501898a9a681b609b156446ef15 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Tue, 9 May 2017 20:29:54 -0500 Subject: L3 updates -- p9_build_smp, p9_fbc_utils p9_build_smp: constrain FFDC collection at 16 chips (current max size for P9 based systems) scrub node references, replace with group clarify X link requirements based on pump mode review and complete callouts p9_fbc_utils: add feature attribute to support pb_init sampling on NDD2+ replace locally defined bit constants with SCOM header file constants Change-Id: Ib1f71488ffd07580a647709d9227112f7d73384f CQ: HW328175 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40308 Tested-by: Jenkins Server Reviewed-by: Thi N. Tran Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN Reviewed-by: Matt K. Light Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40310 Tested-by: FSP CI Jenkins Reviewed-by: Sachin Gupta --- .../chips/p9/procedures/hwp/nest/p9_fbc_utils.C | 61 ++-- .../chips/p9/procedures/hwp/nest/p9_fbc_utils.H | 10 +- .../xml/attribute_info/chip_ec_attributes.xml | 341 ++------------------- .../xml/attribute_info/p9_sbe_attributes.xml | 5 + 4 files changed, 68 insertions(+), 349 deletions(-) (limited to 'src') diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C index 025667cf..aaa63711 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C @@ -39,7 +39,7 @@ // *HWP HWP Owner: Joe McGill // *HWP FW Owner: Thi Tran // *HWP Team: Nest -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: SBE,HB,FSP // @@ -48,39 +48,34 @@ //------------------------------------------------------------------------------ #include #include +#include //------------------------------------------------------------------------------ // Constant definitions //------------------------------------------------------------------------------ -// ADU PMisc Register field/bit definitions -const uint32_t ALTD_SND_MODE_DISABLE_CHECKSTOP_BIT = 19; -const uint32_t ALTD_SND_MODE_MANUAL_CLR_PB_STOP_BIT = 21; -const uint32_t ALTD_SND_MODE_PB_STOP_BIT = 22; - -// FBC Mode Register field/bit definitions -const uint32_t PU_FBC_MODE_PB_INITIALIZED_BIT = 0; - // FBC base address determination constants // system ID (large system) const uint8_t FABRIC_ADDR_LS_SYSTEM_ID_START_BIT = 8; const uint8_t FABRIC_ADDR_LS_SYSTEM_ID_END_BIT = 12; +// msel bits (large & small system) +const uint8_t FABRIC_ADDR_MSEL_START_BIT = 13; +const uint8_t FABRIC_ADDR_MSEL_END_BIT = 14; // group ID (large system) const uint8_t FABRIC_ADDR_LS_GROUP_ID_START_BIT = 15; const uint8_t FABRIC_ADDR_LS_GROUP_ID_END_BIT = 18; // chip ID (large system) const uint8_t FABRIC_ADDR_LS_CHIP_ID_START_BIT = 19; const uint8_t FABRIC_ADDR_LS_CHIP_ID_END_BIT = 21; -// msel bits (large & small system) -const uint8_t FABRIC_ADDR_MSEL_START_BIT = 13; -const uint8_t FABRIC_ADDR_MSEL_END_BIT = 14; //------------------------------------------------------------------------------ // Function definitions //------------------------------------------------------------------------------ + +// NOTE: see comments above function prototype in header fapi2::ReturnCode p9_fbc_utils_get_fbc_state( const fapi2::Target& i_target, bool& o_is_initialized, @@ -88,25 +83,34 @@ fapi2::ReturnCode p9_fbc_utils_get_fbc_state( { FAPI_DBG("Start"); - // TODO: HW328175 - // fapi2::buffer l_fbc_mode_data; - // FAPI_TRY(fapi2::getScom(i_target, PU_FBC_MODE_REG, l_fbc_mode_data), - // "Error reading FBC Mode Register"); - // // fabric is initialized if PB_INITIALIZED bit is one/set - // o_is_initialized = l_fbc_mode_data.getBit(); + fapi2::ATTR_CHIP_EC_FEATURE_HW328175_Type l_hw328175; + fapi2::buffer l_fbc_mode_data; + fapi2::buffer l_pmisc_mode_data; - // currently, sampling FBC init from PB Mode register is unreliable - // as init can drop perodically at runtime (based on legacy sleep backoff) - // until this issue is fixed, just return true to caller - o_is_initialized = true; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW328175, i_target, l_hw328175), + "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_HW328175"); + + if (l_hw328175) + { + // sampling FBC init from PB Mode register is unreliable + // as init can drop perodically at runtime (based on legacy sleep backoff), + // just return true to caller + o_is_initialized = true; + } + else + { + FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM0_PB_CENT_MODE, l_fbc_mode_data), + "Error reading FBC Mode Register"); + // fabric is initialized if PB_INITIALIZED bit is one/set + o_is_initialized = l_fbc_mode_data.getBit(); + } // read ADU PMisc Mode Register state - fapi2::buffer l_pmisc_mode_data; FAPI_TRY(fapi2::getScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data), "Error reading ADU PMisc Mode register"); // fabric is running if FBC_STOP bit is zero/clear - o_is_running = !(l_pmisc_mode_data.getBit()); + o_is_running = !(l_pmisc_mode_data.getBit()); fapi_try_exit: FAPI_DBG("End"); @@ -114,6 +118,7 @@ fapi_try_exit: } +// NOTE: see comments above function prototype in header fapi2::ReturnCode p9_fbc_utils_override_fbc_stop( const fapi2::Target& i_target) { @@ -125,12 +130,12 @@ fapi2::ReturnCode p9_fbc_utils_override_fbc_stop( "Error reading ADU PMisc Mode register"); // set bit to disable checkstop forwarding and write back - l_pmisc_mode_data.setBit(); + l_pmisc_mode_data.setBit(); FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data), "Error writing ADU PMisc Mode register to disable checkstop forwarding to FBC"); // set bit to manually clear stop control and write back - l_pmisc_mode_data.setBit(); + l_pmisc_mode_data.setBit(); FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data), "Error writing ADU PMisc Mode register to manually clear FBC stop control"); @@ -140,6 +145,7 @@ fapi_try_exit: } +// NOTE: see comments above function prototype in header fapi2::ReturnCode p9_fbc_utils_get_chip_base_address( const fapi2::Target& i_target, const p9_fbc_utils_addr_mode_t i_addr_mode, @@ -155,7 +161,6 @@ fapi2::ReturnCode p9_fbc_utils_get_chip_base_address( fapi2::buffer l_base_address; const fapi2::Target FAPI_SYSTEM; - FAPI_DBG("Start"); // retreive attributes which statically determine chips position in memory map @@ -186,7 +191,7 @@ fapi2::ReturnCode p9_fbc_utils_get_chip_base_address( "Error from FAPI_ATTR_GET (ATTR_MEM_MIRROR_PLACEMENT_POLICY)"); // apply system ID - // occupies one field for large system map (three fields for small system map) + // occupies one field for large system map l_base_address.insertFromRight < FABRIC_ADDR_LS_SYSTEM_ID_START_BIT, (FABRIC_ADDR_LS_SYSTEM_ID_END_BIT - FABRIC_ADDR_LS_SYSTEM_ID_START_BIT + 1) > (l_fabric_system_id); diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H index 15a6ff37..5c7f54c9 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H @@ -34,7 +34,7 @@ // *HWP HWP Owner: Joe McGill // *HWP FW Owner: Thi Tran // *HWP Team: Nest -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: SBE,HB,FSP // @@ -78,9 +78,9 @@ const uint64_t FABRIC_CACHELINE_SIZE = 0x80; /// @brief Read FBC/ADU registers to determine state of fabric init and stop /// control signals /// -/// @param[in] i_target Reference to processor chip target -/// @param[out] o_is_initialized State of fabric init signal -/// @param[out] o_is_running State of fabric pervasive stop control +/// @param[in] i_target Reference to processor chip target +/// @param[out] o_is_initialized State of fabric init signal +/// @param[out] o_is_running State of fabric pervasive stop control /// @return fapi::ReturnCode, FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9_fbc_utils_get_fbc_state( @@ -92,7 +92,7 @@ fapi2::ReturnCode p9_fbc_utils_get_fbc_state( /// @brief Use ADU pMisc Mode register to clear fabric stop signal, overriding /// a stop condition caused by a checkstop /// -/// @param[in] i_target Reference to processor chip target +/// @param[in] i_target Reference to processor chip target /// @return fapi::ReturnCode, FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9_fbc_utils_override_fbc_stop( diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 2ce95cff..b379f649 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -358,6 +358,24 @@ + + ATTR_CHIP_EC_FEATURE_HW328175 + TARGET_TYPE_PROC_CHIP + + HW328175 : PB mode register does not reflect steady-state value + of PB init + + + + ENUM_ATTR_NAME_NIMBUS + + 0x20 + LESS_THAN + + + + + ATTR_CHIP_EC_FEATURE_HW367321 TARGET_TYPE_PROC_CHIP @@ -1104,16 +1122,15 @@ ATTR_CHIP_EC_FEATURE_DISABLE_SPEC_STWCX TARGET_TYPE_PROC_CHIP - Nimbus DD1.0 DD2.0 - HW353069 / HW358383 / HW358418 / HW358662 / HW358824 / HW363605 + Nimbus DD1 only: HW353069 / HW358383 / HW358418 / HW358662 / HW358824 / HW363605 Not doing Performance: MB State - Need to disable speculative stwcx ENUM_ATTR_NAME_NIMBUS - 0x10 - GREATER_THAN_OR_EQUAL + 0x20 + LESS_THAN @@ -2412,8 +2429,7 @@ ATTR_CHIP_EC_FEATURE_HW403465> TARGET_TYPE_PROC_CHIP - Nimbus DD1.0 DD2.0 - L1 access latency increases when data footprint should still + Nimbus DD1: L1 access latency increases when data footprint should still be within L1 cache size. Revert L1 LRU changes @@ -2421,7 +2437,7 @@ ENUM_ATTR_NAME_NIMBUS 0x20 - LESS_THAN_OR_EQUAL + LESS_THAN @@ -2512,313 +2528,6 @@ - - ATTR_CHIP_EC_FEATURE_HW403766> - TARGET_TYPE_PROC_CHIP - - HW403766 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW405047> - TARGET_TYPE_PROC_CHIP - - HW405047 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW405602> - TARGET_TYPE_PROC_CHIP - - HW405602 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW405605> - TARGET_TYPE_PROC_CHIP - - HW405605 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW405865> - TARGET_TYPE_PROC_CHIP - - HW405865 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW406641> - TARGET_TYPE_PROC_CHIP - - HW406641 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW406972> - TARGET_TYPE_PROC_CHIP - - HW406972 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW407065> - TARGET_TYPE_PROC_CHIP - - HW407065 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW407165> - TARGET_TYPE_PROC_CHIP - - HW407165 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW408628> - TARGET_TYPE_PROC_CHIP - - HW408628 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW408876> - TARGET_TYPE_PROC_CHIP - - HW408876 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW408917> - TARGET_TYPE_PROC_CHIP - - HW408917 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW408988> - TARGET_TYPE_PROC_CHIP - - HW408988 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW409270> - TARGET_TYPE_PROC_CHIP - - HW409270 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW409365> - TARGET_TYPE_PROC_CHIP - - HW409365 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW408891> - TARGET_TYPE_PROC_CHIP - - Nimbus DD1.0 DD2.0 - HW408891 - Recovery WAT - - - - ENUM_ATTR_NAME_NIMBUS - - 0x10 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW405021> - TARGET_TYPE_PROC_CHIP - - HW409194 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x10 - GREATER_THAN_OR_EQUAL - - - - - - - ATTR_CHIP_EC_FEATURE_HW409194> - TARGET_TYPE_PROC_CHIP - - HW409194 - - - - ENUM_ATTR_NAME_NIMBUS - - 0x20 - GREATER_THAN_OR_EQUAL - - - - - ATTR_CHIP_EC_FEATURE_HW395939 TARGET_TYPE_PROC_CHIP @@ -3169,10 +2878,10 @@ - ATTR_CHIP_EC_FEATURE_MSS_NIMBUS_EC_LESS_THAN_TWO_OH + ATTR_CHIP_EC_FEATURE_MSS_UT_EC_NIMBUS_LESS_THAN_TWO_OH TARGET_TYPE_PROC_CHIP - Attribute used only for memory subsystem procedures. Tells us whether + Attribute used only for memory subsystem unit tests. Tells us whether the chip EC we're running on is less than 2.0 and we're on a Nimbus diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 409ab805..cac558af 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -414,6 +414,11 @@ attribute tank + + ATTR_CHIP_EC_FEATURE_HW328175 + + + ATTR_PROC_XSCOM_BAR_BASE_ADDR_OFFSET 0x000003FC00000000 -- cgit v1.2.1