From 9f9f77cec3cb16d5dc6e5e3f8d417431e4f4ab95 Mon Sep 17 00:00:00 2001 From: Raja Das Date: Thu, 11 Oct 2018 04:39:17 -0500 Subject: L1 loader Axone Pibmem repair parse - Added a check if Pib repr section is not updated, simply skip parsing pib repr section and continue. Change-Id: I79ead4116c7633e0e37a160304578e978bc407c9 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67336 Tested-by: Jenkins Server Reviewed-by: Soma Bhanutej Reviewed-by: Anusha Reddy Rangareddygari Tested-by: FSP CI Jenkins Reviewed-by: Sunil Kumar Reviewed-by: Sachin Gupta Reviewed-by: RAJA DAS --- .../scom_repair_axone/pibmem_repair.S | 63 ++++++++++++++++++++-- src/build/utils/power_axone/sbe_link.H | 5 ++ 2 files changed, 64 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/boot/pibmem_repair/scom_repair_axone/pibmem_repair.S b/src/boot/pibmem_repair/scom_repair_axone/pibmem_repair.S index 43c11fec..cb13ac9e 100644 --- a/src/boot/pibmem_repair/scom_repair_axone/pibmem_repair.S +++ b/src/boot/pibmem_repair/scom_repair_axone/pibmem_repair.S @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -58,9 +58,44 @@ _pibmemRepair: stvd d0, 0(r3) # putscom 50010 reset bit 30 ### Pibmem repair code here - ########################### - - ########################### + ## Row structure + ################################################################ + ### 1B CMD ### 1B END ROW ### 2B PAD ### 4B ADDR ### 8B DATA ### + ################################################################ + # NOTE - Saving LR into r4 and restore back at the end, + # DONOT use R4 in any operation below. + mflr %r4 # Store R4 + _liw %r3, SBE_PIBMEM_REPAIR_SECTION # Pibmem Repair Section Location + _liw %r9, SBE_SEEPROM_BASE_ORIGIN + lwz r8, 0(r3) # offset of pibmem repair section + + # Check if R8 has non-zero offset, This is required if the repair + # section is not loaded onto to binary, no point trying to parse which + # is not loaded. + cmplwi r8, 0x0 # compare r8 to 0 + beq skip_parse_row # if offset is zero, skip row parsing + adde r8, r8, r9 # add base address to offset to get absolute address + + # r8 is pointing to the first row of the table +parse_row: + lvd d0, 0(r8) # Get First 8bytes, r0 points to cmd, r1 points to addr + srwi %r3, %r0, 24 # get the command byte + addi r8, r8, 8 # Point to data offset + lvd d6, 0(r8) # r6 & r7 have the scom data + ## Switch case for the operation to perform based on Command Byte + ## r6/r7 contains the data and r1 contains the address + cmpwibcl 1, 2, %r3, 0, __getscom_bootloader + cmpwibcl 0, 2, %r3, 0, __putscom_bootloader + addi r8, r8, 8 # point to the next row + srwi %r3, %r0, 16 # fetch the second byte after command to check for end row + andi. %r3, %r3, 0x000000ff + cmplwi r3, 0x1 # compare r3 with 1, if not equal got to parser another row + bne parse_row + + # End of Row Parsing +skip_parse_row: + mtlr %r4 # restore LR from r4 + ###################################################### ### Set chiplet enable _liw %r3, 0x5001a # Register 5001A @@ -119,4 +154,24 @@ _pibmemRepair: stvd d0, 0(r3) # putscom 50010 reset bit 30 blr # back to l1_loader + .epilogue _pibmemRepair + + +__getscom_bootloader: + ## r1 has the address and r6/r7 has the data + lvd d28, 0(r1) + ## compare r28 with r6 and r29 with r7, all should match else halt + cmpwbne r28, r6, __compare_failed + cmpwbne r29, r7, __compare_failed + blr + .epilogue __getscom_bootloader + +__putscom_bootloader: + ## r1 has the address and r6/r7 has the data + stvd d6, 0(r1) + blr + .epilogue __putscom_bootloader +__compare_failed: + trap + .epilogue __compare_failed diff --git a/src/build/utils/power_axone/sbe_link.H b/src/build/utils/power_axone/sbe_link.H index 9c786dec..13a19a67 100644 --- a/src/build/utils/power_axone/sbe_link.H +++ b/src/build/utils/power_axone/sbe_link.H @@ -82,6 +82,11 @@ // PK boot offset in header #define SBE_KERNEL_ENTRY_HEADER_OFFSET 28 +// Pibmem Repair Section XIP HDR +// Each section table entry is 12Bytes size, Pibmem repair is 6th section +#define SBE_PIBMEM_REPAIR_SECTION SBE_SEEPROM_BASE_ORIGIN + SBE_XIP_TOC_OFFSET \ + + 72 + /// The physical address offset where SBE-SEEPROM code is loaded /// /// This address *must* be a constant known to the OTPROM code. -- cgit v1.2.1