From 7ebc5456f9cd6efe03d9d17139f2f1a4aa3c5f77 Mon Sep 17 00:00:00 2001 From: Claus Michael Olsen Date: Sat, 3 Sep 2016 10:29:30 -0500 Subject: xip_customize: Updated mailbox attribute support. Removed all *_VALID from pervasive_attributes.xml. Removed ATTR_DPLL_FILTER_BYPASS and ATTR_NEST_MEM_X_O_PCIE_FILTER_BYPASS Added ATTR_IS_MPIPL back into p9_sbe_attributes.xml. Initialized ATTR_PG to 0x0000FFFF in sbe_attributes.xml. Added p9_xip_customize_attributes.xml. Change-Id: Idbe457f9e79ca084e91d02b43c6880e9c4279858 CMVC-Prereq: 1006768 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29215 Reviewed-by: Daniel M. Crowell Reviewed-by: Martin Gloff Reviewed-by: Matt K. Light Reviewed-by: Sachin Gupta Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29216 Reviewed-by: Hostboot Team Tested-by: FSP CI Jenkins --- .../xml/attribute_info/p9_sbe_attributes.xml | 264 +++++++++------------ .../xml/attribute_info/pervasive_attributes.xml | 119 ---------- 2 files changed, 117 insertions(+), 266 deletions(-) (limited to 'src') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 345b4a06..f38be59b 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -41,74 +41,160 @@ ATTR_PIBMEM_REPAIR2 0x0000000000000000 + ATTR_I2C_BUS_DIV_REF 0x0001 - ATTR_FUNCTIONAL_EQ_EC_VALID - 0x00 + ATTR_EQ_GARD + 0x01 - ATTR_EQ_GARD + ATTR_EC_GARD 0x01 - ATTR_EC_GARD - 0x01 + ATTR_NEST_PLL_BUCKET + 0x05 - ATTR_I2C_BUS_DIV_REF_VALID - 0x00 + ATTR_BOOT_FREQ_MULT + 0x00B4 + + + ATTR_CLOCK_PLL_MUX + 0x80010800 - ATTR_IS_MPIPL - 0x0 + ATTR_SS_FILTER_BYPASS + 0x1 - ATTR_BOOT_FREQUENCY_VALID - 0x00 + ATTR_CP_FILTER_BYPASS + 0x1 - ATTR_NEST_PLL_BUCKET - 0x05 + ATTR_IO_FILTER_BYPASS + 0x1 - ATTR_BOOT_FREQ_MULT - 0x00B4 + ATTR_IS_MPIPL + 0x00 - ATTR_HWP_CONTROL_FLAGS_VALID - 0x00 + ATTR_SYSTEM_IPL_PHASE + 0x1 - ATTR_SYSTEM_IPL_PHASE - 0x1 + ATTR_SYS_FORCE_ALL_CORES + 0x00 - ATTR_RISK_LEVEL - 0x0 + ATTR_RISK_LEVEL + 0x0 - ATTR_DISABLE_HBBL_VECTORS - 0x1 + ATTR_DISABLE_HBBL_VECTORS + 0x1 - ATTR_CHIP_SELECTION_VALID - 0x0 + ATTR_MC_SYNC_MODE + 0x01 - ATTR_CHIP_SELECTION - 0x1 + ATTR_PROC_SBE_MASTER_CHIP + 0x01 + + + ATTR_PROC_FABRIC_GROUP_ID + 0x00 + + + ATTR_PROC_FABRIC_CHIP_ID + 0x00 - ATTR_NODE_POS - 0x01 + ATTR_DPLL_BYPASS + 0x0 - ATTR_CHIP_POS - 0x01 + ATTR_NEST_MEM_X_O_PCI_BYPASS + 0x0 + + + ATTR_PG + 0xFFFF + 0xE07D + 0xE03F + 0xE03F + 0xE03F + 0xE01F + 0xE44D + 0xE0FD + 0xE0FD + 0xE1FD + 0xFFFF + 0xFFFF + 0xE1FD + 0xE1FD + 0xE0FD + 0xE07D + 0xE001 + 0xE001 + 0xE001 + 0xE288 + 0xE001 + 0xE001 + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xE1FF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + 0xFFFF + + ATTR_SCRATCH_UINT8_1 0x8 @@ -275,10 +361,6 @@ ATTR_BACKUP_SEEPROM_SELECT 0x0 - - ATTR_MC_SYNC_MODE - 0x01 - ATTR_BOOT_FLAGS 0x80000000 @@ -295,78 +377,6 @@ ATTR_VDD_BOOT_VOLTAGE 0x0 - - - ATTR_PG - 0xFFFF - 0xE07D - 0xE03F - 0xE03F - 0xE03F - 0xE01F - 0xE00D - 0xE0FD - 0xE0FD - 0xE1FD - 0xFFFF - 0xFFFF - 0xE1FD - 0xE1FD - 0xE0FD - 0xE07D - 0xE001 - 0xE001 - 0xE001 - 0xE288 - 0xE001 - 0xE001 - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xE1FF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - 0xFFFF - ATTR_ADU_XSCOM_BAR_BASE_ADDR 0x000603FC00000000 @@ -379,22 +389,10 @@ ATTR_SUN_ID 0x01 - - ATTR_PROC_SBE_MASTER_CHIP - 0x01 - ATTR_PROC_FABRIC_SYSTEM_ID 0x00 - - ATTR_PROC_FABRIC_GROUP_ID - 0x00 - - - ATTR_PROC_FABRIC_CHIP_ID - 0x00 - ATTR_PROC_FABRIC_ADDR_BAR_MODE 0x01 @@ -411,10 +409,6 @@ ATTR_HOSTBOOT_HRMOR_OFFSET 0x8000000 - - ATTR_SYS_FORCE_ALL_CORES - 0x00 - ATTR_MASTER_CORE @@ -439,10 +433,6 @@ 0x48000000 - ATTR_CLOCK_PLL_MUX - 0x80010800 - - ATTR_CLOCK_PLL_MUX0 0x3 @@ -489,26 +479,6 @@ ATTR_RUNN_MODE 0x0 - - ATTR_SS_FILTER_BYPASS - 0x1 - - - ATTR_CP_FILTER_BYPASS - 0x1 - - - ATTR_IO_FILTER_BYPASS - 0x1 - - - ATTR_DPLL_BYPASS - 0x0 - - - ATTR_NEST_MEM_X_O_PCI_BYPASS - 0x0 - ATTR_VDM_ENABLE 0x0 diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index a47555d4..198650d2 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -58,17 +58,6 @@ - - ATTR_FUNCTIONAL_EQ_EC_VALID - TARGET_TYPE_PROC_CHIP - Indicates the validitiy of FW functional EQ/EQ register - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - - ATTR_EQ_GARD TARGET_TYPE_PROC_CHIP @@ -89,28 +78,6 @@ - - ATTR_I2C_BUS_DIV_REF_VALID - TARGET_TYPE_PROC_CHIP - Indicates the validity of ref clock I2C bus divider consumed by - code running out of OTPROM - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - - - ATTR_FW_MODE_FLAGS_VALID - TARGET_TYPE_PROC_CHIP - Indicates the validity of FW flags. Ex: ISTEP_MODE, - SBE_RUNTIME_MODE, MPIPL_MODE, SP_MODE, SBE_FFDC_ENABLE - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - ATTR_ISTEP_MODE TARGET_TYPE_PROC_CHIP @@ -162,17 +129,6 @@ - - ATTR_BOOT_FREQUENCY_VALID - TARGET_TYPE_PROC_CHIP - Indicates if BOOT_FREQ_MULT and NEST_PLL_BUCKET - are valid - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - ATTR_NEST_PLL_BUCKET TARGET_TYPE_SYSTEM @@ -202,17 +158,6 @@ - - ATTR_HWP_CONTROL_FLAGS_VALID - TARGET_TYPE_PROC_CHIP - Indicates if HWP control flags - are valid - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - ATTR_RISK_LEVEL TARGET_TYPE_SYSTEM @@ -237,69 +182,6 @@ - - ATTR_CHIP_SELECTION_VALID - TARGET_TYPE_PROC_CHIP - Indicates that master/slave, node/chip selection attributes - are valid - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - - - ATTR_CHIP_SELECTION - TARGET_TYPE_PROC_CHIP - master/slave bit - uint8 - MASTER = 0x0,SLAVE = 0x1 - - - - - - ATTR_NODE_POS - TARGET_TYPE_PROC_CHIP - Indicate the node position in FSP based systems (unused in Spless systems) - uint8 - - - - - - - ATTR_CHIP_POS - TARGET_TYPE_PROC_CHIP - Indicate the chip position - uint8 - - - - - - - ATTR_SCRATCH6_VALID - TARGET_TYPE_PROC_CHIP - Indicate if scratch reg6 bits are valid - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - - - - ATTR_SCRATCH7_VALID - TARGET_TYPE_PROC_CHIP - Indicate if scratch reg7 bits are valid - uint8 - FALSE = 0x0,TRUE = 0x1 - - - - - ATTR_BACKUP_SEEPROM_SELECT TARGET_TYPE_PROC_CHIP @@ -708,7 +590,6 @@ - ATTR_TARGET_HAS_POWER TARGET_TYPE_PERV -- cgit v1.2.1