From 3d1659b34c258027e03d00573b4042e380629622 Mon Sep 17 00:00:00 2001 From: Nick Bofferding Date: Sat, 22 Apr 2017 10:44:20 -0500 Subject: Update behavioral description of ATTR_SECURITY_MODE attribute - Update behavioral description of ATTR_SECURITY_MODE attribute Change-Id: I34eacb3e541d8cec505713ed2e55a55fd872cbe5 RTC: 170650 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39569 Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Sachin Gupta Reviewed-by: Michael Baiocchi Dev-Ready: Nicholas E. Bofferding Reviewed-by: PARVATHI RACHAKONDA Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39573 Reviewed-by: Hostboot Team Tested-by: FSP CI Jenkins --- .../p9/procedures/xml/attribute_info/pervasive_attributes.xml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index c59e0699..d273bb39 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -462,8 +462,14 @@ ATTR_SECURITY_MODE TARGET_TYPE_SYSTEM - If SBE image has ATTR_SECURITY_MODE == 0b1, then leave SAB bit as is - Else ATTR_SECURITY_MODE == 0b0, then clear the SAB bit + SBE context: If SBE image has ATTR_SECURITY_MODE == 0b1, leave + SAB bit as is. Otherwise (ATTR_SECURITY_MODE == 0b0), query mailbox scratch + register 3 bit 6 and if set, clear the SAB bit. Non-SBE context: If + ATTR_SECURITY_MODE == 0b1, do not attempt to clear the SAB bit via the FSI + path. Otherwise (ATTR_SECURITY_MODE == 0b0), attempt to clear the SAB bit + via the FSI path. Customer level chips will silently ignore such a request, + whereas early lab versions may honor it for debug purposes. + uint8 -- cgit v1.2.1