From db756f42aea0751b81cbbb2438c8e16d6bb005c5 Mon Sep 17 00:00:00 2001
From: Joe McGill <jmcgill@us.ibm.com>
Date: Mon, 24 Apr 2017 10:37:05 -0500
Subject: p9_sbe_nest_initf -- add HWP support to scan n3_br_fure

  for chips not affected by HW388874 (Nimbus DD2+), apply scan inits
  present for n3_br_fure ring

Change-Id: Ifa0d17074741478ecdc35d3131c56f6e270a1a79
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39604
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40114
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
---
 src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C   | 11 +++++++++++
 .../p9/procedures/xml/attribute_info/p9_sbe_attributes.xml    |  5 +++++
 2 files changed, 16 insertions(+)

(limited to 'src/import')

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
index 39037604..19cc84d0 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_nest_initf.C
@@ -160,10 +160,21 @@ fapi2::ReturnCode p9_sbe_nest_initf(const
 
         if (l_attr_chip_unit_pos == N3_CHIPLET_ID)/* N3 Chiplet */
         {
+            uint8_t l_hw388874 = 0;
+            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW388874, i_target_chip, l_hw388874),
+                     "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_HW388874)");
+
             FAPI_DBG("Scan n3_fure ring");
             FAPI_TRY(fapi2::putRing(i_target_chip, n3_fure),
                      "Error from putRing (n3_fure)");
 
+            if (!l_hw388874)
+            {
+                FAPI_DBG("Scan n3_br_fure ring");
+                FAPI_TRY(fapi2::putRing(i_target_chip, n3_br_fure),
+                         "Error from putRing (n3_br_fure)");
+            }
+
             if (!l_read_attr.getBit<10>()) //Check mcs01 is enable
             {
                 FAPI_DBG("Scan n3_mcs01_fure ring");
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
index 25d48e84..409ab805 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -395,6 +395,11 @@ attribute tank
         <virtual/>
   </entry>
 
+  <entry>
+        <name>ATTR_CHIP_EC_FEATURE_HW388874</name>
+        <virtual/>
+  </entry>
+
   <entry>
         <name>ATTR_CHIP_EC_FEATURE_NMMU_DMT_DD2</name>
         <virtual/>
-- 
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