From c75eb0abb0a4329f5c2c63577609c121cd45276d Mon Sep 17 00:00:00 2001
From: Joe McGill <jmcgill@us.ibm.com>
Date: Wed, 26 Oct 2016 07:52:05 -0500
Subject: p9_sbe_mcs_setup -- qualify MCS/MI assert for PPE platform only

  permit Cronus IPL with no MCS/MI units on master chip

Change-Id: Ia988c8ecb35c93d549b899e673ce20c4da30cec2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31841
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31843
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
---
 src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'src/import')

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
index 33bd345d..cb37a5a4 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
@@ -163,9 +163,14 @@ fapi2::ReturnCode p9_sbe_mcs_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C
         l_is_master_sbe &&
         !l_is_mpipl)
     {
+
+#ifdef __PPE__
+        // assert that a viable MCS/MI chiplet is found to service dcbz on the
+        // master processor
         FAPI_ASSERT(l_mcs_chiplets.size() || l_mi_chiplets.size(),
                     fapi2::P9_SBE_MCS_SETUP_NO_MC_FOUND_ERR().set_CHIP(i_target),
                     "No functional MC unit target found");
+#endif
 
         // determine base address
         FAPI_TRY(p9_fbc_utils_get_chip_base_address(i_target,
-- 
cgit v1.2.1