From d9055c39cfed1665008b9a2597f643d3e462b4bd Mon Sep 17 00:00:00 2001 From: Srikantha Meesala Date: Tue, 5 Dec 2017 02:35:31 -0600 Subject: Updated PSI and TOD regs into whitelist Change-Id: I5b8afde659b1c9f7c4f527791efaafb88e03380b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50482 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: SANTOSH BALASUBRAMANIAN Reviewed-by: Sachin Gupta Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50487 Reviewed-by: Hostboot Team --- src/import/chips/p9/security/p9_security_white_black_list.csv | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/import/chips') diff --git a/src/import/chips/p9/security/p9_security_white_black_list.csv b/src/import/chips/p9/security/p9_security_white_black_list.csv index 59d15022..24524a87 100644 --- a/src/import/chips/p9/security/p9_security_white_black_list.csv +++ b/src/import/chips/p9/security/p9_security_white_black_list.csv @@ -18,11 +18,14 @@ Version,Chiplet,Base Address,Chiplet Id - range,User,Register Name,Description/U ,TP,0x00040006,0x00,HWSV,TOD internal path control register,p9_tod_setup.C,write_whitelist, ,Nest 3,0x05013419,0x05,HWSV,PB Electrical Round-Trip Delay Control Register,p9_tod_setup.C,write_whitelist, ,TP,0x00040010,0x00,HWSV,TOD chip control register,p9_tod_setup.C,write_whitelist, +,TP,0x00040022,0x00,HWSV,TOD start fsm register,p9_tod_init.C,write_whitelist, ,Nest 3,0x05012913,0x05,HWSV,PSI Host Bridge Control/Status Register(CLEAR),hwcoProcPsiInit.C,write_whitelist, +,Nest 3,0x0501290E,0x05,HWSV,PSI Host Bridge Control/Status Register,hwcoProcPsiInit.C,write_whitelist, ,Nest 2,0x04011830,0x04,HWSV,PSI Tx Cntl Reg,hwcoProcPsiInit.C,write_whitelist, ,Nest 2,0x04011820,0x04,HWSV,PSI Rx Cntl Reg,hwcoProcPsiInit.C,write_whitelist, ,Nest 2,0x04011831,0x04,HWSV,PSI Tx Mode Reg,hwcoProcPsiInit.C,write_whitelist, ,Nest 2,0x04000019,0x04,HWSV,Chiplet Config Register 1,hwcoProcPsiInit.C,write_whitelist, +,Nest 2,0x04000029,0x04,HWSV,Chiplet Config Register Clear,hwcoProcPsiInit.C,write_whitelist, ,Nest 3,0x05012912,0x05,HWSV,PSI Host Bridge Control/Status Register(OR),hwcoProcPsiInit.C,write_whitelist, ,Nest 3,0x05012800,0x05,HWSV,PSI TX and Common Control Status Register,hwcoProcPsiInit.C,write_whitelist, ,Nest 3,0x05012808,0x05,HWSV,PSI RX Control Status Register,hwcoProcPsiInit.C,write_whitelist, @@ -31,6 +34,10 @@ Version,Chiplet,Base Address,Chiplet Id - range,User,Register Name,Description/U ,Nest 3,0x05012911,0x05,HWSV,PSI Host Bridge Debug Service Register,hwcoProcPsiInit.C,write_whitelist, ,Nest 3,0x0501280A,0x05,HWSV,PSI Rx Error Register,hwcoProcPsiInit.C,write_whitelist, ,Nest 3,0x05012802,0x05,HWSV,PSI Tx Error Register,hwcoProcPsiInit.C,write_whitelist, +,Nest 3,0x05012810,0x05,HWSV,PSI Tx Inta Register,hwcoProcPsiInit.C,write_whitelist, +,Nest 3,0x05012818,0x05,HWSV,PSI Rx Inta Register,hwcoProcPsiInit.C,write_whitelist, +,Nest 3,0x05012813,0x05,HWSV,PSI Tx Misc Register,hwcoProcPsiInit.C,write_whitelist, +,Nest 3,0x0501281B,0x05,HWSV,PSI Rx Misc Register,hwcoProcPsiInit.C,write_whitelist, ,MC,0x070123DB,0x07-0x08,HWSV,MCBIST Control Register,lib/dimm/ccs.H,write_whitelist, ,MC,0x070123A7,0x07-0x08,HWSV,MCP Configured Command Sequence Mode Register,lib/dimm/ccs.H,write_whitelist, ,MC,0x8000C0110701103F,0x07-0x08,HWSV,,lib/dimm/rank.H,write_whitelist, -- cgit v1.2.1