From 0a78e28c88a13d17e19a1825a89341965f78efda Mon Sep 17 00:00:00 2001 From: nagurram-in Date: Mon, 27 Nov 2017 04:43:18 -0600 Subject: Added chiplet range for 0x107D0 scom address in BL/WL csv Dump need to write data to 0x107D0 scom address for controlling the start/stop/rest trace for all perv chiplets. Hence added chiplet range for aforementioned scom address in BL/WL csv. Change-Id: I932d5275d76d2491dc0972bbfc2f25e52c59b1c3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50042 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: SANTOSH BALASUBRAMANIAN Reviewed-by: Sachin Gupta Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50044 Reviewed-by: Hostboot Team --- src/import/chips/p9/security/p9_security_white_black_list.csv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/import/chips') diff --git a/src/import/chips/p9/security/p9_security_white_black_list.csv b/src/import/chips/p9/security/p9_security_white_black_list.csv index 8027baeb..ae976661 100644 --- a/src/import/chips/p9/security/p9_security_white_black_list.csv +++ b/src/import/chips/p9/security/p9_security_white_black_list.csv @@ -829,7 +829,7 @@ Version,Chiplet,Base Address,Chiplet Id - range,User,Register Name,Description/U ,Core,200F0100,0x20-0x37,HWSV, SPL_WKUP-special wakeups GPMMR registers, p9_cpu_special_wakeup.H, write_whitelist, ,EQ,100F0100,0x10-0x15,HWSV, SPL_WKUP-special wakeups GPMMR registers, p9_cpu_special_wakeup.H, write_whitelist, ,,0x050107D0,0x05,DUMP,,for performance dumps,write_whitelist, -,PERV,0x000107D0,0x00,DUMP,,Local checkstops: Only stop trace on the affected core,write_whitelist, +,PERV,0x000107D0,0x00-0x10,DUMP,,Local checkstops: Only stop trace on the affected core,write_whitelist, ,,0x05011C0A,0x05,DUMP,, MPIPL: restart traces ,write_whitelist, ,,0x06000029,0x06,DUMP,,"Stop clocks, except refresh",write_whitelist, ,OBUS,0x09000029,0x09,DUMP,,clear XBUS iovalids,write_whitelist, -- cgit v1.2.1