From 3c180da43f81b1991cdf6bee97b7f03df1f979c7 Mon Sep 17 00:00:00 2001
From: Dean Sanner <dsanner@us.ibm.com>
Date: Thu, 27 Oct 2016 22:01:37 -0500
Subject: Setup MCS ack'er based on target HRMOR

Change-Id: I0eb92357aa788f22cbe64547e5e4c97d99589b1d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31963
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31965
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
---
 src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C | 10 ++++++++++
 1 file changed, 10 insertions(+)

(limited to 'src/import/chips/p9/procedures')

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
index cb37a5a4..79a9b000 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_mcs_setup.C
@@ -145,6 +145,7 @@ fapi2::ReturnCode p9_sbe_mcs_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C
     uint8_t l_is_mpipl;
     uint8_t l_ipl_type;
     uint64_t l_chip_base_address_nm0, l_chip_base_address_nm1, l_chip_base_address_m, l_chip_base_address_mmio;
+    uint64_t l_hostboot_hrmor_offset;
 
     auto l_mcs_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_MCS>();
     auto l_mi_chiplets = i_target.getChildren<fapi2::TARGET_TYPE_MI>();
@@ -173,6 +174,8 @@ fapi2::ReturnCode p9_sbe_mcs_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C
 #endif
 
         // determine base address
+        //      = (chip non-mirrored base address) + (hostboot HRMOR offset)
+        //      min MCS base size is 4GB, local HB will always be below
         FAPI_TRY(p9_fbc_utils_get_chip_base_address(i_target,
                  l_chip_base_address_nm0,
                  l_chip_base_address_nm1,
@@ -180,6 +183,13 @@ fapi2::ReturnCode p9_sbe_mcs_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C
                  l_chip_base_address_mmio),
                  "Error from p9_fbc_utils_get_chip_base_addrs");
 
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_HOSTBOOT_HRMOR_OFFSET, FAPI_SYSTEM,
+                               l_hostboot_hrmor_offset),
+                 "Error from FAPI_ATTR_GET (ATTR_HOSTBOOT_HRMOR_OFFSET)");
+
+        l_chip_base_address_nm0 += l_hostboot_hrmor_offset;
+        l_chip_base_address_nm0 &= 0xFFFFFFFF00000000; // only keep 4GB and up
+
         if (l_mcs_chiplets.size())
         {
             FAPI_TRY(set_hb_dcbz_config(l_mcs_chiplets.front(),
-- 
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