From d1f7e4d58f7baedde533e76c723c5e04ee3a2ca5 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Wed, 15 Mar 2017 12:52:42 -0500 Subject: add support for OBUS PLL buckets p9_frequency_buckets.H p9.obus.pll.scan.initfile document and support base frequencies 1611 MHz - 25.78G, 156.25 MHz ref 1250 MHz - 25G, 156.25 MHz ref 1200 MHz - 19.2G, 133.33 MHz ref pervasive_attributes.xml define ATTR_OB[0123]_PLL_BUCKET to hold encoded ring bucket select value nest_attributes.xml define ATTR_FREQ_O_MHZ array to hold per chiplet OBUS frequency retain ATTR_FREQ_A_MHZ to serve as FBC A link frequency indicator p9_setup_sbe_config.C p9_sbe_attr_setup.C transmit bucket selection through FSP/BMC->SBE mailbox encode OBUS bucket selects in Scratch Reg2 bits 24:31 p9_sbe_chiplet_pll_initf.C p9_sbe_chiplet_pll_initf_errors.xml scan correct ring image based on bucket selector attributes p9_ringId.C p9_ringId.H p9_ring_id.h accomodate three copies of obX_pll_bndy (use ID previously reserved for obX_pll_func, which should not be necessary to scan init) scan_procedures.mk generateWrapper.pl initCompiler infrastructure changes to support build of bucket data p9.fbc.ab_hp.scom.initfile p9.fbc.ioo_tl.scom.initfile p9_tod_setup.C updates to handle A,O frequency attribute changes CMVC-Prereq: 1027320 CMVC-Prereq: 1027496 CMVC-Prereq: 1027579 Change-Id: I42f9bb4037a587f7e3ec8dd9848bdb853ac3d7a0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40159 Tested-by: Jenkins Server Reviewed-by: Matt K. Light Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Dean Sanner Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40164 Tested-by: FSP CI Jenkins Reviewed-by: Sachin Gupta --- .../xml/attribute_info/nest_attributes.xml | 18 ++++++++-- .../xml/attribute_info/p9_sbe_attributes.xml | 16 +++++++++ .../xml/attribute_info/pervasive_attributes.xml | 40 ++++++++++++++++++++++ .../error_info/p9_sbe_chiplet_pll_initf_errors.xml | 13 ++++++- 4 files changed, 84 insertions(+), 3 deletions(-) (limited to 'src/import/chips/p9/procedures/xml') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml index 208bb98e..8ad33b9c 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml @@ -45,23 +45,37 @@ + + ATTR_FREQ_O_MHZ + TARGET_TYPE_PROC_CHIP + + The frequency of a processor's Obus mesh clocks, in MHz. + Provided by the MRW. + + uint32 + + + 4 + + ATTR_FREQ_A_MHZ TARGET_TYPE_SYSTEM - The frequency of a processor's A link clocks, in MHz. + The frequency of a processor's Abus, in MHz. This is the same for all chips in the system. Provided by the MRW. uint32 + ATTR_FREQ_X_MHZ TARGET_TYPE_SYSTEM - The frequency of a processor's X link clocks, in MHz. + The frequency of a processor's Xbus mesh clocks, in MHz. This is the same for all chips in the system. Provided by the MRW. diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 6558a63b..67f0b7e0 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -61,6 +61,22 @@ ATTR_NEST_PLL_BUCKET 0x05 + + ATTR_OB0_PLL_BUCKET + 0x01 + + + ATTR_OB1_PLL_BUCKET + 0x01 + + + ATTR_OB2_PLL_BUCKET + 0x01 + + + ATTR_OB3_PLL_BUCKET + 0x01 + ATTR_BOOT_FREQ_MULT 0x00B4 diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index d273bb39..8ed45ed6 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -140,6 +140,46 @@ + + ATTR_OB0_PLL_BUCKET + TARGET_TYPE_PROC_CHIP + Select OBUS0 pll setting from one of the supported frequencies + uint8 + + + + + + + ATTR_OB1_PLL_BUCKET + TARGET_TYPE_PROC_CHIP + Select OBUS1 pll setting from one of the supported frequencies + uint8 + + + + + + + ATTR_OB2_PLL_BUCKET + TARGET_TYPE_PROC_CHIP + Select OBUS2 pll setting from one of the supported frequencies + uint8 + + + + + + + ATTR_OB3_PLL_BUCKET + TARGET_TYPE_PROC_CHIP + Select OBUS3 pll setting from one of the supported frequencies + uint8 + + + + + ATTR_BOOT_FREQ_MULT TARGET_TYPE_PROC_CHIP diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml index 75a9c3b9..f82fa041 100755 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_chiplet_pll_initf_errors.xml @@ -5,7 +5,7 @@ - + @@ -33,4 +33,15 @@ UNIT_POS + + + RC_P9_SBE_CHIPLET_PLL_INITF_UNSUPPORTED_OBUS_BUCKET + Unsupported OBUS PLL bucket select + TARGET + OB0_BUCKET_INDEX + OB1_BUCKET_INDEX + OB2_BUCKET_INDEX + OB3_BUCKET_INDEX + + -- cgit v1.2.1