From 84cfeb2aef7acdb4ce7e7c758faf00b8c6a10fd7 Mon Sep 17 00:00:00 2001 From: Claus Michael Olsen Date: Mon, 9 Apr 2018 13:48:56 -0500 Subject: Risk level 3/4/5 support: Step 1 - backward compatibility and v6 image - Introducing RV_RL3/4/5 ring variant (RV) support for EC/EQ chiplets. - Dropping RV support for all chiplet's instance rings which saves 456 Quad bytes and 58 Nest bytes in Seeprom's TOR slots (compared to master). - Each additional risk level adds 144 bytes in Seeprom TOR slots. - Various changes to data names associated with ring variants to clarify that the notion of ring variants is now specific only to Common rings while Instance rings only have the BASE variant. - Also, removed backwards compatibility to TOR v5, i.e. from before we introduced RL2 in february. Assumption is that all images/drivers used in fips910/920 and OP920 are TOR v6. - This commit produces a TOR v6 image to ensure EKB FSP CI success. Key_Cronus_Test=XIP_REGRESS Change-Id: Icfcb1e68fd74a10ffc48ee7a5da528a8042ef3b1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56973 Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: PPE CI Tested-by: Cronus HW CI Tested-by: Hostboot CI Tested-by: FSP CI Jenkins Reviewed-by: Kahn C. Evans Reviewed-by: James N. Klazynski Reviewed-by: Joseph J. McGill Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56982 Reviewed-by: Sachin Gupta --- .../chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/import/chips/p9/procedures/xml') diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 51cb1e66..9486f295 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -210,7 +210,7 @@ HWP/Init "risk level" enabled. Used by HB to pass to HB driven HWPs uint8 - RL0 = 0x0,RL1 = 0x1,RL2 = 0x2 + RL0 = 0x0,RL1 = 0x1,RL2 = 0x2,RL3 = 0x3,RL4 = 0x4, RL5 = 0x5 -- cgit v1.2.1