From 49371ca5b793a66a182d1145e3f10b20271164bb Mon Sep 17 00:00:00 2001 From: Soma BhanuTej Date: Tue, 18 Oct 2016 09:53:41 -0400 Subject: Implementation of PIB stopclock with CBS Change-Id: I8e19b31dc4ab5ca7fd832baa6f3dd94db928b72a RTC:163074 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31411 Tested-by: Jenkins Server Reviewed-by: Joachim Fenkes Reviewed-by: SRINIVAS V. POLISETTY Reviewed-by: PARVATHI RACHAKONDA Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34918 Reviewed-by: Sachin Gupta --- .../p9/procedures/hwp/perv/p9_common_stopclocks.C | 124 ++++++++++++++++++++- .../p9/procedures/hwp/perv/p9_common_stopclocks.H | 6 + .../chips/p9/procedures/hwp/perv/p9_stopclocks.C | 109 +++++++++++++----- .../p9/procedures/hwp/perv/p9_tp_stopclocks.C | 43 +++---- 4 files changed, 231 insertions(+), 51 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/perv') diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C index e1d1bb32..2ead7460 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.C @@ -44,6 +44,16 @@ #include #include +enum P9_common_stopclocks_Private_Constants +{ + CBS_ACK_POLL = 20, + P9_WAIT_CBS_ACK_HW_NS_DELAY = 16000, + P9_WAIT_CBS_ACK_SIM_CYCLE_DELAY = 800000, + CBS_CMD_COMPLETE_POLL = 20, + P9_WAIT_CBS_CMD_COMPLETE_HW_NS_DELAY = 16000, + P9_WAIT_CBS_CMD_COMPLETE_SIM_CYCLE_DELAY = 800000 + +}; /// @brief --Raise partial good fences /// --set abstclk muxsel,syncclk_muxsel @@ -91,7 +101,7 @@ fapi_try_exit: /// @brief Raise chiplet fence for chiplets /// -/// @param[in] i_target_chip Reference to TARGET_TYPE_PERV target +/// @param[in] i_target_chiplet Reference to TARGET_TYPE_PERV target /// @return FAPI2_RC_SUCCESS if success, else error code. fapi2::ReturnCode p9_common_stopclocks_raise_fence( const fapi2::Target& i_target_chiplet) @@ -143,3 +153,115 @@ fapi_try_exit: return fapi2::current_err; } + +/// @brief Stopping PIB & NET domain clocks in PERV chiplet using CBS +/// +/// @param[in] i_target_chip Reference to TARGET_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +fapi2::ReturnCode p9_common_stopclocks_pib_net_clkstop(const fapi2::Target& i_target_chip) +{ + fapi2::buffer l_data32_root_ctrl0; + + FAPI_INF("Entering p9_common_stopclocks_pib_net_clkstop ..."); + + FAPI_DBG("Clear FSI Fence1 to open CBS-CC interface"); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); + + if(l_data32_root_ctrl0.getBit()) + { + l_data32_root_ctrl0.clearBit(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); + } + + FAPI_DBG("Check that state of CBS_REQ"); + + if(l_data32_root_ctrl0.getBit()) + { + FAPI_DBG("CBS_REQ is high - Calling p9_common_stopclocks_poll_cbs_cmd_complete function"); + FAPI_TRY(p9_common_stopclocks_poll_cbs_cmd_complete(i_target_chip)); + } + else + { + FAPI_DBG("CBS_REQ is Low - Hence CBS is idle"); + } + + FAPI_DBG("Set CBS_CMD to stop PIB,NET clocks"); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); + l_data32_root_ctrl0.insertFromRight(0x4); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); + + FAPI_DBG("Set CBS_REQ to 1 to start command"); + l_data32_root_ctrl0.setBit(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); + + FAPI_DBG("Calling p9_common_stopclocks_poll_cbs_cmd_complete function"); + FAPI_TRY(p9_common_stopclocks_poll_cbs_cmd_complete(i_target_chip)); + + FAPI_INF("Exiting p9_common_stopclocks_pib_net_clkstop ..."); + +fapi_try_exit: + return fapi2::current_err; +} + + + +/// @brief Checking for CBS request complete +/// +/// @param[in] i_target_chip Reference to TARGET_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +fapi2::ReturnCode p9_common_stopclocks_poll_cbs_cmd_complete(const fapi2::Target& + i_target_chip) +{ + fapi2::buffer l_data32_cbs_cc_stat; + fapi2::buffer l_data32_root_ctrl0; + int l_timeout = 0; + + FAPI_INF("Entering p9_common_stopclocks_poll_cbs_cmd_complete ..."); + FAPI_DBG("Wait for CBS_ACK to go to 1"); + l_timeout = CBS_ACK_POLL; + + while (l_timeout != 0) + { + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_CBS_STAT_FSI, l_data32_cbs_cc_stat)); + bool l_poll_data = l_data32_cbs_cc_stat.getBit(); + + if(l_poll_data == 1) + { + break; + } + + fapi2::delay(P9_WAIT_CBS_ACK_HW_NS_DELAY, P9_WAIT_CBS_ACK_SIM_CYCLE_DELAY); + --l_timeout; + } + + FAPI_ASSERT(l_timeout > 0, fapi2::CBS_ACK_NOT_HIGH_ERR(), "CBS_ACK is not HIGH with in expected time"); + + FAPI_DBG("Lower CBS_REQ"); + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); + l_data32_root_ctrl0.clearBit(); + FAPI_TRY(fapi2::putCfamRegister(i_target_chip, PERV_ROOT_CTRL0_FSI, l_data32_root_ctrl0)); + + FAPI_DBG("Poll for CBS_ACK to go to 0"); + l_timeout = CBS_CMD_COMPLETE_POLL; + + while (l_timeout != 0) + { + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_CBS_STAT_FSI, l_data32_cbs_cc_stat)); + bool l_poll_data = l_data32_cbs_cc_stat.getBit(); + + if(l_poll_data == 0) + { + break; + } + + fapi2::delay(P9_WAIT_CBS_CMD_COMPLETE_HW_NS_DELAY, P9_WAIT_CBS_CMD_COMPLETE_SIM_CYCLE_DELAY); + --l_timeout; + } + + FAPI_ASSERT(l_timeout > 0, fapi2::CBS_ACK_NOT_LOW_ERR(), "CBS_ACK is not LOW with in expected time"); + + FAPI_INF("Exiting p9_common_stopclocks_poll_cbs_cmd_complete ..."); + +fapi_try_exit: + return fapi2::current_err; +} diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H index 8809b8b1..cda78126 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_common_stopclocks.H @@ -51,4 +51,10 @@ fapi2::ReturnCode p9_common_stopclocks_raise_fence( fapi2::ReturnCode p9_common_stopclocks_set_vitalfence_flushmode( const fapi2::Target& i_target_chiplet); +fapi2::ReturnCode p9_common_stopclocks_pib_net_clkstop( + const fapi2::Target& i_target_chip); + +fapi2::ReturnCode p9_common_stopclocks_poll_cbs_cmd_complete( + const fapi2::Target& i_target_chip); + #endif diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C index ae0b7d99..54b61956 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_stopclocks.C @@ -102,12 +102,17 @@ fapi2::ReturnCode p9_stopclocks(const fapi2::Target(); + tp_ep_rst = l_data64.getBit(); + tp_vitl_clk_off = l_data64.getBit(); + tp_mesh_clk_en = l_data64.getBit(); +#else + FAPI_TRY(fapi2::getCfamRegister(i_target_chip, PERV_PERV_CTRL0_FSI, l_cfam_data)); + tp_cplt_en = l_cfam_data.getBit(); + tp_ep_rst = l_cfam_data.getBit(); + tp_vitl_clk_off = l_cfam_data.getBit(); + tp_mesh_clk_en = l_cfam_data.getBit(); +#endif + FAPI_DBG("Read PERV_CTRL0 Reg Value and observe CPLT_EN = %s, EP_RST = %s, VITL_CLKOFF = %s", btos(tp_cplt_en), + btos(tp_ep_rst), btos(tp_vitl_clk_off)); - FAPI_INF("p9_stopclocks : Reading Clock Status Register in the TP chiplet to see if PIB and NET clocks are running. Bits 5 & 6 should be zero."); - - FAPI_DBG("Read Perv Clock Stat SL"); - FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_SL, l_sl_clock_status)); - FAPI_DBG("Perv CLOCK_STAT_SL Value : %#018lX", l_sl_clock_status); - - FAPI_DBG("Read Perv Clock Stat NSL"); - FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_NSL, l_nsl_clock_status)); - FAPI_DBG("Perv CLOCK_STAT_NSL Value : %#018lX", l_nsl_clock_status); - - FAPI_DBG("Read Perv Clock Stat ARY"); - FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_ARY, l_ary_clock_status)); - FAPI_DBG("Perv CLOCK_STAT_ARY Value : %#018lX", l_ary_clock_status); - - if(l_sl_clock_status.getBit() || - l_sl_clock_status.getBit() || - l_nsl_clock_status.getBit() || - l_nsl_clock_status.getBit() || - l_ary_clock_status.getBit() || - l_ary_clock_status.getBit()) + if (tp_cplt_en && !(tp_ep_rst) && !(tp_vitl_clk_off)) { - FAPI_INF("p9_stopclocks : At least one of the NET or PIB clocks is NOT running. May not be able to use the PCB fabric to access chiplets."); - pcb_clks_are_off = true; + FAPI_INF("p9_stopclocks : Reading Clock Status Register in the TP chiplet to see if PIB and NET clocks are running. Bits 5 & 6 should be zero."); + + FAPI_DBG("Read Perv Clock Stat SL"); + FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_SL, l_sl_clock_status)); + FAPI_DBG("Perv CLOCK_STAT_SL Value : %#018lX", l_sl_clock_status); + + FAPI_DBG("Read Perv Clock Stat NSL"); + FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_NSL, l_nsl_clock_status)); + FAPI_DBG("Perv CLOCK_STAT_NSL Value : %#018lX", l_nsl_clock_status); + + FAPI_DBG("Read Perv Clock Stat ARY"); + FAPI_TRY(fapi2::getScom(l_target_tp, PERV_CLOCK_STAT_ARY, l_ary_clock_status)); + FAPI_DBG("Perv CLOCK_STAT_ARY Value : %#018lX", l_ary_clock_status); + + if(l_sl_clock_status.getBit() || + l_sl_clock_status.getBit() || + l_nsl_clock_status.getBit() || + l_nsl_clock_status.getBit() || + l_ary_clock_status.getBit() || + l_ary_clock_status.getBit()) + { + FAPI_ERR("p9_stopclocks : At least one of the NET or PIB clocks is NOT running. May not be able to use the PCB fabric to access chiplets."); + pcb_clks_are_off = true; + } + else + { + pcb_clks_are_off = false; + } } else { - pcb_clks_are_off = false; + FAPI_ERR("p9_stopclocks : TP chiplet dont have favourable conditions to access Clock Controller registers."); + pcb_clks_are_off = true; } @@ -254,17 +290,32 @@ fapi2::ReturnCode p9_stopclocks(const fapi2::Target Skipping VITAL Stopclocks..! <--"); + FAPI_ERR("p9_stopclocks : WARNING::VITAL clocks can't be stopped in SBE mode\n\t --> Skipping VITAL Stopclocks..! <--"); #else FAPI_INF("p9_stopclocks : Stopping Pervasive VITAL clocks"); diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C index 8c5d2b03..b2c05fc6 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C @@ -107,6 +107,7 @@ fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target(fapi2::TARGET_FILTER_TP, fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_EXCEPT_PLL, l_clock_regions)); + FAPI_DBG("p9_tp_stopclocks: Regions value: %#018lX", l_clock_regions); } else if(i_stop_tp_clks) { @@ -114,32 +115,32 @@ fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target(fapi2::TARGET_FILTER_TP, fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ALL_EXCEPT_PIB_NET_PLL, l_clock_regions)); + FAPI_DBG("p9_tp_stopclocks: Regions value: %#018lX", l_clock_regions); } - else if(i_stop_pib_clks) + + if(!i_stop_tp_clks && i_stop_pib_clks) //Using CBS interface to stop clock in PIB & NET { - FAPI_DBG("p9_tp_stopclocks: TP regions selected is REGIONS_ONLY_PIB_NET"); - FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64( - i_target_chip.getChildren(fapi2::TARGET_FILTER_TP, - fapi2::TARGET_STATE_FUNCTIONAL)[0], REGIONS_ONLY_PIB_NET, l_clock_regions)); + FAPI_DBG("p9_tp_stopclocks: Call module clock start stop for PIB, NET only"); + FAPI_TRY(p9_common_stopclocks_pib_net_clkstop(i_target_chip)); } + else + { + FAPI_DBG("p9_tp_stopclocks: Call module clock start stop for TP chiplet"); + FAPI_TRY(p9_sbe_common_clock_start_stop( + i_target_chip.getChildren(fapi2::TARGET_FILTER_TP, + fapi2::TARGET_STATE_FUNCTIONAL)[0], CLOCK_CMD, DONT_STARTSLAVE, DONT_STARTMASTER, + l_clock_regions, CLOCK_TYPES)); - FAPI_DBG("p9_tp_stopclocks: Regions value: %#018lX", l_clock_regions); - - FAPI_DBG("p9_tp_stopclocks: Call module clock start stop for Tp chiplet"); - FAPI_TRY(p9_sbe_common_clock_start_stop( - i_target_chip.getChildren(fapi2::TARGET_FILTER_TP, - fapi2::TARGET_STATE_FUNCTIONAL)[0], CLOCK_CMD, DONT_STARTSLAVE, DONT_STARTMASTER, - l_clock_regions, CLOCK_TYPES)); - - FAPI_DBG("p9_tp_stopclocks: Assert vital fence and set flush_inhibit"); - FAPI_TRY(p9_common_stopclocks_set_vitalfence_flushmode( - i_target_chip.getChildren(fapi2::TARGET_FILTER_TP, - fapi2::TARGET_STATE_FUNCTIONAL)[0])); + FAPI_DBG("p9_tp_stopclocks: Assert vital fence and set flush_inhibit"); + FAPI_TRY(p9_common_stopclocks_set_vitalfence_flushmode( + i_target_chip.getChildren(fapi2::TARGET_FILTER_TP, + fapi2::TARGET_STATE_FUNCTIONAL)[0])); - FAPI_DBG("p9_tp_stopclocks: Raise partial good fences and set abist_muxsel, syncclk_muxsel"); - FAPI_TRY(p9_common_stopclocks_cplt_ctrl_action_function( - i_target_chip.getChildren(fapi2::TARGET_FILTER_TP, - fapi2::TARGET_STATE_FUNCTIONAL)[0])); + FAPI_DBG("p9_tp_stopclocks: Raise partial good fences and set abist_muxsel, syncclk_muxsel"); + FAPI_TRY(p9_common_stopclocks_cplt_ctrl_action_function( + i_target_chip.getChildren(fapi2::TARGET_FILTER_TP, + fapi2::TARGET_STATE_FUNCTIONAL)[0])); + } if(i_stop_pib_clks) { -- cgit v1.2.1