From f5041a109f48bf70213b6d4ec9bae034a1adc0f1 Mon Sep 17 00:00:00 2001 From: Santosh Puranik Date: Thu, 12 May 2016 12:28:46 +0530 Subject: Change to plat code that applies gards ATTR_EQ_GARD and ATTR_EC_GARD are left aligned now Added reading the C4 board pin to determine master/slave Change-Id: I0df1b07c1ced5849eca90e02b8344d70490e1737 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24415 Tested-by: Jenkins Server Reviewed-by: Sachin Gupta Reviewed-by: RAJA DAS Reviewed-by: Gregory S. Still --- sbe/sbefw/sberegaccess.C | 39 +++++++++++++++++++++++++++++---------- sbe/sbefw/sberegaccess.H | 8 +------- 2 files changed, 30 insertions(+), 17 deletions(-) (limited to 'sbe') diff --git a/sbe/sbefw/sberegaccess.C b/sbe/sbefw/sberegaccess.C index be5bdb2a..2dbbe8b3 100644 --- a/sbe/sbefw/sberegaccess.C +++ b/sbe/sbefw/sberegaccess.C @@ -9,6 +9,7 @@ #include "sbetrace.H" #include "fapi2.H" #include +#include using namespace fapi2; @@ -31,7 +32,7 @@ uint32_t SbeRegAccess::init() } Target l_chip = plat_getChipTarget(); // Read SBE messaging register into iv_messagingReg - l_rc = getscom_abs(SBE_MESSAGING_REGISTER_ADDR, &iv_messagingReg); + l_rc = getscom_abs(PERV_SB_MSG_SCOM, &iv_messagingReg); if(PCB_ERROR_NONE != l_rc) { SBE_ERROR(SBE_FUNC"Failed reading sbe messaging reg., RC: 0x%08X. ", @@ -40,7 +41,7 @@ uint32_t SbeRegAccess::init() } // Read Mailbox register 8 to check if the mailbox registers 3 and 6 are // valid - l_rc = getscom_abs(SBE_MBX8_REGISTER_ADDR, &l_mbx8); + l_rc = getscom_abs(PERV_SCRATCH_REGISTER_8_SCOM, &l_mbx8); if(PCB_ERROR_NONE != l_rc) { SBE_ERROR(SBE_FUNC"Failed reading mailbox reg 7, RC: 0x%08X. ", @@ -50,7 +51,7 @@ uint32_t SbeRegAccess::init() if(l_mbx8 & SBE_MBX8_MBX3_VALID_MASK) { // Read MBX3 - l_rc = getscom_abs(SBE_MBX3_REGISTER_ADDR, &iv_mbx3); + l_rc = getscom_abs(PERV_SCRATCH_REGISTER_3_SCOM, &iv_mbx3); if(PCB_ERROR_NONE != l_rc) { SBE_ERROR(SBE_FUNC"Failed reading mailbox reg 3, RC: 0x%08X. ", @@ -78,7 +79,7 @@ uint32_t SbeRegAccess::init() if(l_mbx8 & SBE_MBX8_MBX6_VALID_MASK) { // Read MBX6 - l_rc = getscom_abs(SBE_MBX6_REGISTER_ADDR, &iv_mbx6); + l_rc = getscom_abs(PERV_SCRATCH_REGISTER_6_SCOM, &iv_mbx6); if(PCB_ERROR_NONE != l_rc) { SBE_ERROR(SBE_FUNC"Failed reading mailbox reg 6, RC: 0x%08X. " @@ -86,9 +87,27 @@ uint32_t SbeRegAccess::init() break; } } - // TODO via RTC:150291 Need to get the exact attribute name that - // provides the master/slave role + // If the master/slave bit is 0 (either default or read from mbx6), + // check the C4 board pin to determine role + if(0 == iv_isSlave) + { + uint64_t l_sbeDevIdReg = 0; + // Read device ID register + l_rc = getscom_abs(PERV_DEVICE_ID_REG, &l_sbeDevIdReg); + if(PCB_ERROR_NONE != l_rc) + { + SBE_ERROR(SBE_FUNC"Failed reading device id reg, RC: 0x%08X. " + l_rc); + break; + } + iv_isSlave = l_sbeDevIdReg & SBE_DEV_ID_C4_PIN_MASK; + SBE_DEBUG(SBE_FUNC"Overriding master/slave with data read from " + "C4 pin: HI: 0x%08X, LO: 0x%08X", + (uint32_t)(l_sbeDevIdReg >> 32), + (uint32_t)(l_sbeDevIdReg & 0xFFFFFFFF)); + } } while(false); + SBE_DEBUG(SBE_FUNC"Read mailbox registers: mbx8: 0x%08X, mbx3: 0x%08X, " "mbx6: 0x%08X", (uint32_t)(l_mbx8 >> 32), (uint32_t)(iv_mbx3 >> 32), (uint32_t)(iv_mbx6 >> 32)); @@ -115,7 +134,7 @@ uint32_t SbeRegAccess::updateSbeState(const sbeState &i_state) iv_prevState = iv_currState; iv_currState = i_state; - l_rc = putscom_abs(SBE_MESSAGING_REGISTER_ADDR, iv_messagingReg); + l_rc = putscom_abs(PERV_SB_MSG_SCOM, iv_messagingReg); if(PCB_ERROR_NONE != l_rc) { SBE_ERROR(SBE_FUNC"Failed to update state to messaging " @@ -145,7 +164,7 @@ uint32_t SbeRegAccess::updateSbeStep(const uint8_t i_major, iv_majorStep = i_major; iv_minorStep = i_minor; - l_rc = putscom_abs(SBE_MESSAGING_REGISTER_ADDR, iv_messagingReg); + l_rc = putscom_abs(PERV_SB_MSG_SCOM, iv_messagingReg); if(l_rc) { SBE_ERROR(SBE_FUNC"Failed to update SBE step to messaging " @@ -170,7 +189,7 @@ uint32_t SbeRegAccess::setSbeReady() uint32_t l_rc = 0; iv_sbeBooted = true; - l_rc = putscom_abs(SBE_MESSAGING_REGISTER_ADDR, iv_messagingReg); + l_rc = putscom_abs(PERV_SB_MSG_SCOM, iv_messagingReg); if(l_rc) { SBE_ERROR(SBE_FUNC"Failed to update SBE ready state to " @@ -198,7 +217,7 @@ uint32_t SbeRegAccess::setMpIplMode(const bool i_set) uint8_t l_set = i_set; iv_mpiplMode = i_set; FAPI_ATTR_SET(ATTR_IS_MPIPL, Target(), l_set); - l_rc = putscom_abs(SBE_MBX3_REGISTER_ADDR, iv_mbx3); + l_rc = putscom_abs(PERV_SCRATCH_REGISTER_3_SCOM, iv_mbx3); if(l_rc) { SBE_ERROR(SBE_FUNC"Failed to set/clear MPIPL flag in " diff --git a/sbe/sbefw/sberegaccess.H b/sbe/sbefw/sberegaccess.H index 5f0005d1..e89f4d82 100644 --- a/sbe/sbefw/sberegaccess.H +++ b/sbe/sbefw/sberegaccess.H @@ -214,17 +214,11 @@ class SbeRegAccess uint64_t iv_messagingReg; }; - // Scom address definitions for mailbox scratch registers, note that the - // mailbox numbering starts at 0 - static const uint32_t SBE_MESSAGING_REGISTER_ADDR = 0x50009; - static const uint32_t SBE_MBX3_REGISTER_ADDR = 0x5003A; - static const uint32_t SBE_MBX6_REGISTER_ADDR = 0x5003D; - static const uint32_t SBE_MBX8_REGISTER_ADDR = 0x5003F; - // Bit masks defining bits in the above registers that the SBE is // interested in static const uint64_t SBE_MBX8_MBX3_VALID_MASK = 0x2000000000000000ULL; static const uint64_t SBE_MBX8_MBX6_VALID_MASK = 0x0400000000000000ULL; + static const uint64_t SBE_DEV_ID_C4_PIN_MASK = 0x0000000000800000ULL; }; #endif //__SBEFW_SBEREGACCESS_H -- cgit v1.2.1