From aeb890bb01fdd8b3aece4eccb9ff9d260b0d36d6 Mon Sep 17 00:00:00 2001 From: Joachim Fenkes Date: Thu, 7 Jul 2016 17:41:44 +0200 Subject: p9_sbe_chiplet_reset: Change NX_1 hang pulse period to 68s The NX logic requires the NX_1 hang pulse (N0 hang pulse 2) to fire every 68s, but it used to be set up for half that, so change the procedure to use the correct value of 35. Change-Id: I2b8d81717a5b9d1f05c7c3d3f38403c89de82648 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26717 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Abhishek Agarwal Reviewed-by: Joachim Fenkes Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26721 Reviewed-by: Sachin Gupta --- import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C | 4 ++-- import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'import') diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C index f6272ec7..5021966c 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C @@ -1020,8 +1020,8 @@ static fapi2::ReturnCode p9_sbe_chiplet_reset_nest_hang_cnt_setup( l_data64.clearBit<6>(); //HANG_PULSE_1_REG.SUPPRESS_HANG_1 = 0 FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_1_REG, l_data64)); //Setting HANG_PULSE_2_REG register value (Setting all fields) - //HANG_PULSE_2_REG.HANG_PULSE_REG_2 = p9SbeChipletReset::HANG_PULSE_0X22 - l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X22); + //HANG_PULSE_2_REG.HANG_PULSE_REG_2 = p9SbeChipletReset::HANG_PULSE_0X23 + l_data64.insertFromRight<0, 6>(p9SbeChipletReset::HANG_PULSE_0X23); l_data64.clearBit<6>(); //HANG_PULSE_2_REG.SUPPRESS_HANG_2 = 0 FAPI_TRY(fapi2::putScom(i_target_cplt, PERV_HANG_PULSE_2_REG, l_data64)); //Setting HANG_PULSE_3_REG register value (Setting all fields) diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H index 0d416ace..e083588c 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H @@ -62,6 +62,7 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants HANG_PULSE_0X17 = 0x17, HANG_PULSE_0X18 = 0x18, HANG_PULSE_0X22 = 0x22, + HANG_PULSE_0X23 = 0x23, HANG_PULSE_0X13 = 0x13, HANG_PULSE_0X03 = 0x03, OPCG_ALIGN_SETTING = 0x5000000000003020ull, -- cgit v1.2.1