From f5b5ff37d64562a28a08aa2a80f3e8eec4be7c1a Mon Sep 17 00:00:00 2001 From: Joe Dery Date: Mon, 15 Aug 2016 16:53:45 -0400 Subject: p9_common_poweronoff: delay 10us/40k simcycles between FSM idle polling Change-Id: I296ffb4520f276fc0ed8594122b59367c5b3e04e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28271 Reviewed-by: Kevin F. Reick Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: YUE DU Reviewed-by: Sumit Kumar Reviewed-by: Gregory S. Still Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28275 Tested-by: FSP CI Jenkins Reviewed-by: Sachin Gupta --- .../chips/p9/procedures/hwp/lib/p9_common_poweronoff.C | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) (limited to 'import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C') diff --git a/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C b/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C index 54e8a871..64af9bf3 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C +++ b/import/chips/p9/procedures/hwp/lib/p9_common_poweronoff.C @@ -67,8 +67,8 @@ const uint64_t PPM_PFSNS[2] = { C_PPM_PFSNS, EQ_PPM_PFSNS }; -enum { CYCLES_PER_MS = 500000, - INST_PER_LOOP = 8, +enum { FSM_IDLE_POLLING_HW_NS_DELAY = 10000, + FSM_IDLE_POLLING_SIM_CYCLE_DELAY = 40000, PFET_STATE_LENGTH = 2, VXX_PG_SEL_LEN = 4 }; @@ -158,11 +158,14 @@ p9_common_poweronoff( // Poll for PFETCNTLSTAT_REG[VDD_PG_STATE] for 0b1000 (FSM idle) // – Timeout value = 1ms FAPI_DBG("Polling for power gate sequencer state: FSM idle"); - l_loopsPerMs = CYCLES_PER_MS / INST_PER_LOOP; + l_loopsPerMs = 1E6 / FSM_IDLE_POLLING_HW_NS_DELAY; // Note that the Lamda assumes that l_data already contains the do { + fapi2::delay(FSM_IDLE_POLLING_HW_NS_DELAY, + FSM_IDLE_POLLING_SIM_CYCLE_DELAY); + FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data), "getScom failed for address PPM_PFCS"); // poll } @@ -200,13 +203,16 @@ p9_common_poweronoff( // Poll for PFETCNTLSTAT_REG[VDD_PG_STATE] for 0b1000 (FSM idle) // – Timeout value = 1ms FAPI_DBG("Polling for power gate sequencer state: FSM idle"); - l_loopsPerMs = CYCLES_PER_MS / INST_PER_LOOP; + l_loopsPerMs = 1E6 / FSM_IDLE_POLLING_HW_NS_DELAY; do { + fapi2::delay(FSM_IDLE_POLLING_HW_NS_DELAY, + FSM_IDLE_POLLING_SIM_CYCLE_DELAY); + FAPI_TRY(fapi2::getScom(i_target, PPM_PFCS[l_type], l_data), "getScom failed for address PPM_PFCS"); // poll - FAPI_DBG("timeout l_loopsPerMs. %x", l_loopsPerMs); + //FAPI_DBG("timeout l_loopsPerMs. %x", l_loopsPerMs); } while ((l_data.getBit < VCS_PG_STATE_BIT + PG_STATE_IDLE_OFFSET > () == 0 ) && (--l_loopsPerMs != 0)); -- cgit v1.2.1