From f9ba70879a5a60faa540e56a91c96fc5f5c1a9c4 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Mon, 4 Dec 2017 11:33:33 -0600 Subject: disable ECC bypass for Cumulus DD1.0 Nimbus DD2.0 disable will go into op910 only (for Boston Coral) but not into master Change-Id: I28376316be3e6700af97df83a02c48e46d715dec CQ: HW415945 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50445 Tested-by: FSP CI Jenkins Reviewed-by: Jenny Huynh Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: YUE DU Reviewed-by: Thi N. Tran Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50453 Reviewed-by: Hostboot Team Reviewed-by: Sachin Gupta --- .../chips/p9/procedures/hwp/initfiles/p9_l2_scom.C | 10 +++++++--- .../xml/attribute_info/chip_ec_attributes.xml | 17 +++++++++++++++++ .../procedures/xml/attribute_info/p9_sbe_attributes.xml | 4 ++++ 3 files changed, 28 insertions(+), 3 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C index 7406aa21..aa5d3892 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C @@ -29,8 +29,9 @@ using namespace fapi2; +constexpr uint64_t literal_0 = 0; constexpr uint64_t literal_0b0001 = 0b0001; -constexpr uint64_t literal_0b1000 = 0b1000; +constexpr uint64_t literal_0b0100 = 0b0100; constexpr uint64_t literal_1 = 1; constexpr uint64_t literal_8 = 8; constexpr uint64_t literal_0b0000 = 0b0000; @@ -47,6 +48,8 @@ fapi2::ReturnCode p9_l2_scom(const fapi2::Target& TGT0, FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE)); fapi2::ATTR_SYSTEM_IPL_PHASE_Type l_TGT1_ATTR_SYSTEM_IPL_PHASE; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, TGT1, l_TGT1_ATTR_SYSTEM_IPL_PHASE)); + fapi2::ATTR_CHIP_EC_FEATURE_HW415945_Type l_TGT2_ATTR_CHIP_EC_FEATURE_HW415945; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW415945, TGT2, l_TGT2_ATTR_CHIP_EC_FEATURE_HW415945)); fapi2::ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID_Type l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID, TGT1, l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID)); fapi2::ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID_Type l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID; @@ -86,7 +89,8 @@ fapi2::ReturnCode p9_l2_scom(const fapi2::Target& TGT0, l_scom_buffer.insert<21, 1, 63, uint64_t>(l_EXP_L2_L2MISC_L2CERRS_CFG_HASH_L3_ADDR_EN_ON ); } - if ((l_TGT1_ATTR_SYSTEM_IPL_PHASE == ENUM_ATTR_SYSTEM_IPL_PHASE_HB_RUNTIME)) + if (((l_TGT1_ATTR_SYSTEM_IPL_PHASE == ENUM_ATTR_SYSTEM_IPL_PHASE_HB_RUNTIME) + && (l_TGT2_ATTR_CHIP_EC_FEATURE_HW415945 == literal_0))) { constexpr auto l_EXP_L2_L2MISC_L2CERRS_CFG_CAC_ERR_REPAIR_EN_ON = 0x1; l_scom_buffer.insert<15, 1, 63, uint64_t>(l_EXP_L2_L2MISC_L2CERRS_CFG_CAC_ERR_REPAIR_EN_ON ); @@ -105,7 +109,7 @@ fapi2::ReturnCode p9_l2_scom(const fapi2::Target& TGT0, } l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_0b0001 ); - l_scom_buffer.insert<8, 4, 60, uint64_t>(literal_0b1000 ); + l_scom_buffer.insert<8, 4, 60, uint64_t>(literal_0b0100 ); FAPI_TRY(fapi2::putScom(TGT0, 0x1001080bull, l_scom_buffer)); } { diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index ccca23da..cd7a4900 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -5730,6 +5730,23 @@ + + ATTR_CHIP_EC_FEATURE_HW415945 + TARGET_TYPE_PROC_CHIP + + Magenta Oatmeal -- disable ECC bypass + + + + ENUM_ATTR_NAME_CUMULUS + + 0x10 + EQUAL + + + + + ATTR_CHIP_EC_FEATURE_OBUS_HW419305 TARGET_TYPE_PROC_CHIP diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 91658d4f..353d183e 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -545,6 +545,10 @@ attribute tank ATTR_CHIP_EC_FEATURE_USE_XIVE_HW_RESET + + ATTR_CHIP_EC_FEATURE_HW415945 + + ATTR_CHIP_EC_FEATURE_HW404391_SCOM -- cgit v1.2.1