From d366d4d3fd4750660586c2fa983c12020406fa49 Mon Sep 17 00:00:00 2001 From: "Christian R. Geddes" Date: Tue, 30 Oct 2018 18:03:11 -0500 Subject: Revert "Clear INT_CQ related firs after completing sync_reset in MPIPL" This reverts commit 9b1a1383bb554e9810f45717c3f44782c79411f3. Change-Id: I31b958d11dc1bbe058712e48831baa5945823af9 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68201 Tested-by: Jenkins Server Tested-by: PPE CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68203 Tested-by: FSP CI Jenkins Reviewed-by: Sachin Gupta --- .../p9/procedures/hwp/nest/p9_sbe_check_quiesce.C | 46 ---------------------- .../p9/procedures/hwp/nest/p9_sbe_check_quiesce.H | 5 --- 2 files changed, 51 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C index 3b134c4d..a4296742 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.C @@ -810,57 +810,11 @@ extern "C" { l_data.setBit(); FAPI_TRY(fapi2::putScom(i_target, PU_INT_CQ_RST_CTL, l_data)); - FAPI_TRY(p9_clear_int_fir_regs(i_target), "error clearing int_cq firs"); - fapi_try_exit: FAPI_DBG("p9_intp_check_quiesce: Exiting..."); return fapi2::current_err; } - //--------------------------------------------------------------------------------- - // NOTE: description in header - //--------------------------------------------------------------------------------- - fapi2::ReturnCode p9_clear_int_fir_regs( - const fapi2::Target& i_target) - { - // Number of register we need to read in order to clear INT_CQ firs - const uint8_t l_numRegs = 20; - const uint64_t l_fir_reg_addrs_to_read_to_clear[l_numRegs] = - { - PU_INT_PC_ERR0_WOF, PU_INT_PC_ERR0_FATAL, - PU_INT_PC_ERR0_RECOV, PU_INT_PC_ERR0_INFO, - PU_INT_PC_ERR1_WOF, PU_INT_PC_ERR1_FATAL, - PU_INT_PC_ERR1_RECOV, PU_INT_PC_ERR1_INFO, - PU_INT_PC_VPC_WOF_ERR, PU_INT_PC_VPC_FATAL_ERR, - PU_INT_PC_VPC_RECOV_ERR, PU_INT_PC_VPC_INFO_ERR, - PU_INT_VC_WOF_ERR_G0, PU_INT_VC_WOF_ERR_G1, - PU_INT_VC_FATAL_ERR_G1, PU_INT_VC_FATAL_ERR_G0, - PU_INT_VC_RECOV_ERR_G0, PU_INT_VC_RECOV_ERR_G1, - PU_INT_VC_INFO_ERR_G0, PU_INT_VC_INFO_ERR_G1 - }; - - fapi2::buffer l_fir_clear_data(0); - - // Read from each register in order to clear it (per scomdef) - // We don't care what was read out. - for (uint8_t i = 0; i < l_numRegs; i++) - { - FAPI_TRY(fapi2::getScom(i_target, l_fir_reg_addrs_to_read_to_clear[i], l_fir_clear_data)); - } - - // Clean up data buffer incase data was read - l_fir_clear_data.flush<0>(); - - // clear PU_INT_CQ_WOF via write (any write to this reg should clear) - FAPI_TRY(fapi2::putScom(i_target, PU_INT_CQ_WOF, l_fir_clear_data)); - - // Write all 0's to PU_INT_CQ_FIR to get rid of any stale firs - FAPI_TRY(fapi2::putScom(i_target, PU_INT_CQ_FIR, l_fir_clear_data)); - - fapi_try_exit: - return fapi2::current_err; - } - //--------------------------------------------------------------------------------- // NOTE: description in header //--------------------------------------------------------------------------------- diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H index fff31973..9d6e46c2 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H @@ -130,11 +130,6 @@ extern "C" { fapi2::ReturnCode p9_int_scrub_caches( const fapi2::Target& i_target); - /// @brief Helper function to clear out all INT_CQ firs - /// @param[in] i_target => P9 chip target - /// @return FAPI_RC_SUCCESS if the fir regs were cleared correctly - fapi2::ReturnCode p9_clear_int_fir_regs( - const fapi2::Target& i_target); } //extern "C" #endif //_P9_SBE_CHECK_QUIESCE_H_ -- cgit v1.2.1