From 40d3c1667e11183db9d90a34aabab39a823b1810 Mon Sep 17 00:00:00 2001 From: Joe McGill Date: Sat, 16 Feb 2019 10:11:11 -0500 Subject: cleanup references to chip-centric EC feature attributes Change-Id: Ib777b27c6013a647ae86e6ff5973bab19faceb56 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71994 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: PPE CI Tested-by: Hostboot CI Reviewed-by: Jenny Huynh Reviewed-by: LUKE MURRAY Reviewed-by: Christopher W. Steffen Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71999 Reviewed-by: RAJA DAS --- .../p9/procedures/hwp/initfiles/p9_ncu_scom.C | 10 +- .../xml/attribute_info/chip_ec_attributes.xml | 131 ++++++++++++++++++++- .../xml/attribute_info/p9_sbe_attributes.xml | 4 + 3 files changed, 138 insertions(+), 7 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C index c8b5ce8c..bcd22694 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -60,8 +60,8 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target& TGT0, FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID, TGT1, l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID)); fapi2::ATTR_SMF_CONFIG_Type l_TGT1_ATTR_SMF_CONFIG; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SMF_CONFIG, TGT1, l_TGT1_ATTR_SMF_CONFIG)); - fapi2::ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY_Type l_TGT2_ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY; - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY, TGT2, l_TGT2_ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY)); + fapi2::ATTR_CHIP_EC_FEATURE_HW440920_Type l_TGT2_ATTR_CHIP_EC_FEATURE_HW440920; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW440920, TGT2, l_TGT2_ATTR_CHIP_EC_FEATURE_HW440920)); fapi2::buffer l_scom_buffer; { FAPI_TRY(fapi2::getScom( TGT0, 0x1001100aull, l_scom_buffer )); @@ -166,7 +166,7 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target& TGT0, l_scom_buffer.insert<0, 1, 63, uint64_t>(l_EXP_NC_NCMISC_NCSCOMS_TLBIE_STALL_EN_ON ); l_scom_buffer.insert<1, 3, 61, uint64_t>(literal_6 ); - if ((l_TGT2_ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY != literal_0)) + if ((l_TGT2_ATTR_CHIP_EC_FEATURE_HW440920 != literal_0)) { l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_15 ); } @@ -175,7 +175,7 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target& TGT0, l_scom_buffer.insert<4, 4, 60, uint64_t>(literal_4 ); } - if ((l_TGT2_ATTR_CHIP_EC_FEATURE_P9C_LOGIC_ONLY != literal_0)) + if ((l_TGT2_ATTR_CHIP_EC_FEATURE_HW440920 != literal_0)) { l_scom_buffer.insert<8, 8, 56, uint64_t>(literal_0x01 ); } diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index e6194c3d..eb60a7f8 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -847,9 +847,34 @@ + + ATTR_CHIP_EC_FEATURE_HW446279 + TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP + + HW446279 SMP Abus Cable Failure + Use PPE SW recovery + + + + ENUM_ATTR_NAME_CUMULUS + + 0x10 + GREATER_THAN_OR_EQUAL + + + + ENUM_ATTR_NAME_AXONE + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + ATTR_CHIP_EC_FEATURE_HW446279_DISABLE_FIX - TARGET_TYPE_PROC_CHIP + TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP HW446279 SMP Abus Cable Failure Disable HW fixes to rely on PPE SW recovery @@ -862,6 +887,13 @@ GREATER_THAN_OR_EQUAL + + ENUM_ATTR_NAME_AXONE + + 0x10 + GREATER_THAN_OR_EQUAL + + @@ -8094,7 +8126,7 @@ - ATTR_CHIP_EC_FEATURE_HW404391_SCAN> + ATTR_CHIP_EC_FEATURE_HW404391_SCAN TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Nimbus DD2.1+: Workaround glxmux xstate issue by adjusting scan flush @@ -8125,6 +8157,31 @@ + + ATTR_CHIP_EC_FEATURE_HW404391_SCAN_OB12 + TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP + + Nimbus DD2.1+: Workaround glxmux xstate issue by adjusting scan flush + state of selected latches in NVDL and PHY logic + + + + ENUM_ATTR_NAME_CUMULUS + + 0x11 + GREATER_THAN_OR_EQUAL + + + + ENUM_ATTR_NAME_AXONE + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + ATTR_CHIP_EC_FEATURE_HW404391_SCOM> TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP @@ -8378,6 +8435,23 @@ + + ATTR_CHIP_EC_FEATURE_HW440920 + TARGET_TYPE_PROC_CHIP + + Revert to ordered ("p8") TLBIE mode, disable NMMU snoop of TLBIE. + + + + ENUM_ATTR_NAME_CUMULUS + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + ATTR_CHIP_EC_FEATURE_HW440920_DISABLE_FIX TARGET_TYPE_PROC_CHIP @@ -8698,4 +8772,57 @@ + + ATTR_CHIP_EC_FEATURE_MEMORY_DIRECT_ATTACHED + TARGET_TYPE_PROC_CHIP + + The processor supports direct attached memory via DDR interface + + + + ENUM_ATTR_NAME_NIMBUS + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + + + ATTR_CHIP_EC_FEATURE_MEMORY_DMI_ATTACHED + TARGET_TYPE_PROC_CHIP + + The processor supports memory attached via Centaur memory buffer chip. + DMI connection links processor and Centaur chips. + + + + ENUM_ATTR_NAME_CUMULUS + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + + + ATTR_CHIP_EC_FEATURE_MEMORY_OMI_ATTACHED + TARGET_TYPE_PROC_CHIP + + The processor supports memory attached via OCMB memory buffer chip. + OMI connection links processor and OCMB chips. + + + + ENUM_ATTR_NAME_AXONE + + 0x10 + GREATER_THAN_OR_EQUAL + + + + + diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 841b62b2..9954493a 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -569,6 +569,10 @@ attribute tank ATTR_CHIP_EC_FEATURE_SW430383 + + ATTR_CHIP_EC_FEATURE_HW440920 + + ATTR_SBE_ADDR_KEY_STASH_ADDR 0x0000000000000000 -- cgit v1.2.1