From 2d663084a8605ce9cf07b2da89bb15bf433451d8 Mon Sep 17 00:00:00 2001 From: Ben Gass Date: Fri, 19 Oct 2018 07:32:27 -0500 Subject: Update p9_mss_eff_grouping for Axone support Add p9a_omi_setup_bars procedure Add eclipse project files to .gitignore Change-Id: Ia18cd213ac8b3682e5718b3c631dad631b97170f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67755 Tested-by: FSP CI Jenkins Tested-by: Jenkins Server Tested-by: PPE CI Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Jennifer A. Stofer Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67763 Reviewed-by: RAJA DAS --- src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C | 4 ++-- src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C | 4 ++-- src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C | 2 +- .../procedures/xml/attribute_info/chip_ec_attributes.xml | 14 ++++++++++---- .../p9/procedures/xml/attribute_info/nest_attributes.xml | 10 +++++----- 5 files changed, 20 insertions(+), 14 deletions(-) diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C index 5830540b..0dac8644 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l2_scom.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -104,7 +104,7 @@ fapi2::ReturnCode p9_l2_scom(const fapi2::Target& TGT0, if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x12)) || ((l_chip_id == 0x6) - && (l_chip_ec == 0x13)) ) + && (l_chip_ec == 0x13)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) ) { l_scom_buffer.insert<32, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID ); l_scom_buffer.insert<36, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C index c4d15b85..2401f42d 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_l3_scom.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -118,7 +118,7 @@ fapi2::ReturnCode p9_l3_scom(const fapi2::Target& TGT0, if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x12)) || ((l_chip_id == 0x6) - && (l_chip_ec == 0x13)) ) + && (l_chip_ec == 0x13)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) ) { l_scom_buffer.insert<23, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID ); l_scom_buffer.insert<27, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID ); diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C index bcd22694..099d1b63 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_ncu_scom.C @@ -89,7 +89,7 @@ fapi2::ReturnCode p9_ncu_scom(const fapi2::Target& TGT0, if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x11)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x12)) || ((l_chip_id == 0x6) - && (l_chip_ec == 0x13)) ) + && (l_chip_ec == 0x13)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) ) { l_scom_buffer.insert<44, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID ); l_scom_buffer.insert<48, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID ); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 84de0d63..3db8e356 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -8225,7 +8225,7 @@ ATTR_CHIP_EC_FEATURE_EXTENDED_ADDRESSING_MODE> - TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP + TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP Defines chip HW support for extended addressing mode @@ -8244,6 +8244,13 @@ GREATER_THAN_OR_EQUAL + + ENUM_ATTR_NAME_AXONE + + 0x10 + GREATER_THAN_OR_EQUAL + + @@ -8825,11 +8832,10 @@ - ATTR_CHIP_EC_FEATURE_MEMORY_OMI_ATTACHED + ATTR_CHIP_EC_FEATURE_OMI TARGET_TYPE_PROC_CHIP - The processor supports memory attached via OCMB memory buffer chip. - OMI connection links processor and OCMB chips. + Chip uses OpenCAPI Memory Interface diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml index fc15e45f..57510a03 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml @@ -5,7 +5,7 @@ - + @@ -995,7 +995,7 @@ Set by p9_mss_eff_grouping. uint64 - 4 + 8 @@ -1010,7 +1010,7 @@ Set by p9_mss_eff_grouping. uint64 - 4 + 8 @@ -1387,7 +1387,7 @@ Used by p9_setup_bars. uint64 - 4 + 8 @@ -1402,7 +1402,7 @@ Used by p9_setup_bars. uint64 - 4 + 8 -- cgit v1.2.1