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* Build p9n 10 and 20 by default.Ben Gass2017-04-061-10/+50
* Support for TARGET_TYPE_PHBSantosh Puranik2017-04-066-6/+86
* Remove traces from FAPI_TRY as temporary workaroundSachin Gupta2017-04-061-3/+4
* Do the real LPC reset for DD2CHRISTINA L. GRAVES2017-04-062-1/+33
* add TARGET_TYPE_MCMatt K. Light2017-04-061-2/+4
* literal definitionsAnusha Reddy Rangareddygari2017-04-064-62/+65
* STOP: UIH updates on trace and phantom interrupt handlingYue Du2017-04-061-4/+18
* Remove '-m32' gcc flag in ppetraceppspashabk-in2017-04-061-4/+3
* Reduce trace buffer sizeSachin Gupta2017-04-041-2/+2
* Adding good LCO settings to initfileLuke Murray2017-04-031-0/+41
* Op-Build distribute tool updatespashabk-in2017-04-031-20/+52
* Adu moved to pibmem for lab performance improvementSachin Gupta2017-03-316-16/+14
* Add workaround so p9_suspend_io can be called systems with no PHB5crgeddes2017-03-311-0/+22
* HW404292: Assert analog fence in cache_chiplet_resetYue Du2017-03-313-2/+10
* HW405243/IPL: Assert/drop pcb_mux_disable around quad power offYue Du2017-03-313-6/+61
* update DPLL and IVRM initsJoe McGill2017-03-313-4/+61
* IPL: Change select_ex to use core/eq targets instead of pervYue Du2017-03-311-25/+23
* disable noise window for DD1 HW406577Shelton Leung2017-03-311-0/+17
* support customization of Nimbus DD1 PCI reference clock speedJoe McGill2017-03-312-0/+38
* Defining generic RingId_t type for transitional eCMD releaseKahn Evans2017-03-301-1/+2
* Modify op distribute toolspashabk-in2017-03-291-19/+4
* p9_sbe_chiplet_reset,p9_sbe_arrayinitAnusha Reddy Rangareddygari2017-03-295-5/+120
* Solve CI issueSachin Gupta2017-03-292-4/+6
* Enablement of additional eq_ana_bndy rings for Nimbus DD2Sumit Kumar2017-03-245-27/+104
* SBE Tag added in the xip header only for SBE ReleasesRaja Das2017-03-241-0/+1
* Updated MPIPL Flag in Scratch3 Reg in Continue MPIPLRaja Das2017-03-241-0/+4
* Increased the size of buildTag in xip header by another 4BytesRaja Das2017-03-243-9/+2
* adding opencapi to ATTR_OPTICS_CONFIG_MODEJoshua Hannan2017-03-231-1/+3
* Include p9_ring_id.h or p9_ringId.HKahn Evans2017-03-232-0/+2
* Attribute support of customization of Nimbus DD1 PCI reference clock speed.Thi Tran2017-03-234-6/+30
* p9_suspend_io procedure with updates from review feedbackRicardo Mata2017-03-233-0/+463
* HW406130: Reduce dma read requests from 16->8 in NX initsJenny Huynh2017-03-231-0/+18
* Update quad power off so HB can call it on Slave Quadscrgeddes2017-03-236-105/+92
* p9_sbe_tp_chiplet_init3: Start PLL SL clocksJoachim Fenkes2017-03-231-2/+12
* PM: Updated QPMR and SGPE Header with 24x7 offset and length.Prem Shanker Jha2017-03-231-4/+25
* SBE op-build distribute toolspashabk-in2017-03-231-0/+102
* Build infra updates for op-buildspashabk-in2017-03-233-34/+17
* p9_pba_coherent_utils -- correct OCI address wrap logicJoe McGill2017-03-221-2/+2
* BMC Mpipl isteps updated, 50009 Reg updated for Major/Minor IstepRaja Das2017-03-215-9/+54
* Add risklevel for HW399624 due to perf penalty; Add HW405851Nick Klazynski2017-03-211-0/+17
* Inclusion of p9_ring_id.hKahn Evans2017-03-2112-10/+22
* Core Init additions to put ABIST engines in parallel mode for Nimbus DD1.0Thi Tran2017-03-212-2/+26
* Update proc_select_ex to remove target from old MC groupcrgeddes2017-03-211-93/+72
* TOR API cleanup: Removing support for GET_CPLT_LEVEL_RINGSClaus Michael Olsen2017-03-203-538/+14
* SBE Dump parser (sbestate, sbelocalregister, ppestate, pibmem)Raja Das2017-03-201-10/+65
* ADU set DMA mode by defaultspashabk-in2017-03-201-1/+2
* Consolidating globals in SBEspashabk-in2017-03-2025-232/+377
* p9_abist: Support for p9ndd2Markus Dobler2017-03-161-0/+17
* Change for INT unit because I had reset being set that should only be for DD2CHRISTINA L. GRAVES2017-03-161-2/+8
* p9_sbe_tp_chiplet_init3Anusha Reddy Rangareddygari2017-03-141-1/+9
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