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* p9_sbe_tracearray -- satsify PRD calls to manage core trace arraysJoe McGill2018-03-071-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As a carryover from prior projects, PRD code currently contains logic which attempts to restart the core trace arrays (via the SBE HWP) after processing a recoverable error emitted from the core. The current HWP flags an error in this case (indicating that the core trace arrays are not SCOM retrievable, which is true for all levels of p9). This generates a customer visible error log with a FW type callout, which is undesirable. This patch is intended to satisfy the current PRD call which intends to reset and start the core traces, without triggering the check mentioned above or attempting to access non-implemented SCOM registers. Ultimately it should have no effect on the actual core tracing, which is managed on p9 by non-SCOM accessible logic in PC. I confirmed with Jim Bishop that the PC logic will not stop tracing on recoverable errors, so there should be no exposure. Change-Id: I77e47f71d18b6a3a762ab52b0f6b42d022153f3b CQ: SW418341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54857 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54861 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Check for disable scom filtering bitspashabk-in2018-03-065-10/+37
| | | | | | | | | | | | | Disable scom filtering if the scom filtering disable bit is set Change-Id: I866275da3b05d340636e5e847eb63e14b3a67937 cmvc-prereq: 1046050 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53854 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52428 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix a couple of EKB files to prevent CMVC quirkaravnair-in2018-03-062-3/+3
| | | | | | | | | | | | | | | | | | | | CMVC expands the date command strings added as comments in these two files. So when we try using the auto code checkin tool to push code from hwsv Git repo to CMVC, we end up checking in these files always - as they show the current date versus the actual date command strings. Change-Id: Ibe82b679f14d781c7b64ae8dcdd7ab2356accf8d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54830 Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54836
* Extend sbe-debug.py to get ppe register ffdcspashabk-in2018-03-061-28/+96
| | | | | | | | | | Parse PPE register ffdc from PIBMEM dump Change-Id: Id9a3b6a598760c0d0b8648f627d09b2b238abbc7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54880 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Disable WOF for Cumulus DD1.0Dan Crowell2018-03-051-0/+7
| | | | | | | | | | | | | | Change-Id: I4d4704098f92004f5a6a141e16b80a2b2dd2a3ff Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54925 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54932 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Enable risklevel2, match v44 of security wikiNick Klazynski2018-03-021-3/+3
| | | | | | | | | | | | | | | Change-Id: I9ee4a8c97705ea5aa984c2c0137ed012d50eb658 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54711 Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54720 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Axone support to TP stopclocksSoma BhanuTej2018-03-025-46/+125
| | | | | | | | | | | | | | | | | | Change-Id: I0960ec588156f3df3f863b6c5fa41bbed95e089e RTC: 183048 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53139 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Dev-Ready: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: NAGENDRA K. GURRAM <nagendra.g@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53152 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Axone MC uses same pll/clock setup as in Cumulus.Ben Gass2018-03-011-1/+16
| | | | | | | | | | | | | | | | | Set HW426891 attribute for Axone. Change-Id: I2c023f3f7cd4060d5acd9bc7ce39bd58b5c56c05 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54069 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54076 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Update to putRingUtils to proper scanning of perv_pll_bndy_flt ringsClaus Michael Olsen2018-02-282-6/+15
| | | | | | | | | | | | | | | | | | I've updated p9_putRingUtils.C for SBE to make sure we do a 1-bit boundary scanning for the perv_pll_bndy_flt rings since they are override rings by nature. Change-Id: I1c8a63708c571f67be5359b1a0e4a9b050a8275b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54575 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54587 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* STOP: Support Suspend Entry/Exit and Fix Pig CollisionYue Du2018-02-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | 1) also cleanup todos in Stop Hcode 2) make STOP3 complete trans in SSH Key_Cronus_Test=PM_REGRESS Change-Id: I28a146e15e455f09f8d8ff588e122d5ecf34110a CQ: SW416550 CQ: HW437955 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54660 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54664 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Run lpc_init on all processorsDean Sanner2018-02-281-14/+1
| | | | | | | | | | | | | In systems that have multiple procs that have LPC busses, Hostboot couldn't access any LPC bus except for master (where lpc_init was run) Change-Id: I4ea9a40e6496f60a1b2b77f3f8136ecbc4a07859 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54722 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add support for p9c 1.2Ben Gass2018-02-236-20/+80
| | | | | | | | | | | | | | | | | Also initial mk files for p9n 2.3, but p9c 1.2 will be first. Change-Id: Ia73aba37be5bcf64b1b2cfe5b1ed153b189c7777 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53909 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54542 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add Cumulus DD1.1 initsNick Klazynski2018-02-231-46/+291
| | | | | | | | | | | | | | | | | | | | | | | CQ: SW416424 cmvc-prereq: 1046058 cmvc-prereq: 1043606 cmvc-prereq: 1045920 cmvc-prereq: 1046552 cmvc-prereq: 1045908 Change-Id: I3752f5b5868d7cc8ed3ffdf69a13025989a47eaa Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54270 Dev-Ready: Jenny Huynh <jhuynh@us.ibm.com> Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54284 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add EQ ATOMIC LOCK SCOM to security write whitelist for FFDCAmit Tendolkar2018-02-231-0/+1
| | | | | | | | | | | | | | | | | | Special wakeup fails from FSP need to colect some CME SCOMs that can be accessed after grabbing this lock. Does not comprise access to any sensitive hardware / firmware facility Change-Id: If074c73478f2d8feb586c41aee8eb49b8a9fce6a CQ: SW417220 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54429 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54436 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Adding output_path option for sbe-debug.pyAnusha Reddy Rangareddygari2018-02-231-57/+81
| | | | | | | | | | | | To put the outfiles to required directory Change-Id: If2888abb858eb1055c67fc7d9744fa4264e71af7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54349 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
* PM_SPWKUP: Clear wakeup notify select bit to enable auto special wakeupGreg Still2018-02-221-1/+11
| | | | | | | | | | | | | | | | | | | | - Deal with Hostboot cores coming out of istep 4 Key_Cronus_Test=PM_REGRESS Change-Id: Ie990d82eed0cb5ab3c71752a557d2f5b197d5642 CQ:SW412666 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54140 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54166 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* LPC: Add empty files for mirroring to HB, PPE, HWSVJoachim Fenkes2018-02-222-0/+50
| | | | | | | | | | Change-Id: If904019d1a847136be3e553302ab5e29ae0a8f23 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54482 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54508 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* SBE RegressionRaja Das2018-02-193-19/+61
| | | | | | | | | | | - Allowed invalid scom via MBOX3 bit 12 for Test team Change-Id: Ia47255b6c89dfe7554e5ddc2a3954a2c939fc58b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54111 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Additional risk level support - (step 2) Updating the image w/RL2Claus Michael Olsen2018-02-174-20/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit changes the images' .rings section by adding the TOR RL2 variant slot to the runtime Quad chiplets, EQ and EC. Specifically, we have changed the definition of the ATTR_RISK_LEVEL attribute to now have three risk levels, RL0 (prev FALSE), RL1 (prev TRUE) and RL2 (new). To accomodate RL2, a new "override" txt file has been created, ./attribute_ovd/runtime_risk2.txt and changes to many other files using the ATTR_RISK_LEVEL attrib have been updated as well. Lastly, and to allow for the inclusion of RL2 rings in the HW image, the TOR_VERSION has been updated to version 6 which will allow for RL2 support in the ring ID metadata files. p9_setup_sbe_config is updated to write the RISK_LEVEL value into scratch 3 bits 28:31, and deprecate the existing mailbox. RISK_LEVEL processing has been removed from p9_sbe_attr_setup. It's only function is to seed mailboxes which are empty via the attribute state present in the SEEPROM. Since RISK_LEVEL is zero at image build time, and explicitly cleared as a result of every customization, there's logically no need to process the RISK_LEVEL here. PPE changes to accomodate the new RISK_LEVEL mailbox location need to be implemented in the PLAT code: src/hwpf/target.C Key_Cronus_Test=XIP_REGRESS HW-ImageBuild-Preqeq=52659 - 52659 must be fully merged in Cronus and HB before this commit (53292) can be merged. This is to avoid a Coreq situation. CQ: SW416424 cmvc-prereq: 1046058 cmvc-prereq: 1043606 cmvc-prereq: 1045920 Change-Id: Ia0471219916602cc0041a2c55a1070013f66a7d9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53292 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53322
* Updating NCU tlbie pacing dialsLuke C. Murray2018-02-171-4/+4
| | | | | | | | | | | | | | | | | | | This setting improves tlbie latencies that were measured on IBMi. Also commit generated initfile changes causing Jenkins compliation failure. Change-Id: I206fa3c8f07859d44f6f82f3eadebf6f11352637 CQ: HW438757 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54157 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54179 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add attribute to give platform more control over PM_RESETChristian Geddes2018-02-161-1/+17
| | | | | | | | | | | | | | | | | | | | | | | The PM_RESET hwp calls special wakeup enable on all EX targets, then will clear auto-special wakeup bit on the core if special wakeup is done. In some cases hostboot does not want these steps of the PM_RESET. This attribute gives the platform the ability to decide if they want to enable special wakeup and clear autowakeup on the cores during PM_RESET CQ:SW412666 Change-Id: I8f2e40f4b122f3ff6a048fa6931a1e47f89d3e4f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53953 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53991 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Get a z compile workingOliver Morlok2018-02-1618-1/+1348
| | | | | | | | | Change-Id: I8ca342778fb8fb5e8019f6f50c1b36c2b675d668 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54062 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* hwpErrors: Use wildcard instead of explicit listJoachim Fenkes2018-02-162-88/+2
| | | | | | | | | | | | The makefile was including all XMLs but one (that was unused) anyway. Switch to wildcard so we don't have to explicitly touch hwpErrors.mk every time we add an error XML file. Change-Id: I127dcb75ab3ecb0dadaf73e06d6f6fd3e8294524 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54212 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* SBE Space optimisationRaja Das2018-02-163-2/+4
| | | | | | | | | | | | | 1. sbe tracearray chip-op back to pibmem 2. ram procedure moved to seeprom 3. pibmem size available is around 85720 4. seeprom size available is around 175kb Change-Id: Id11a47724d48eb1a16f096e7d02b6d57aa76331a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54086 Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Protect Firmware from exposure to HW423533Lennard Streat2018-02-151-0/+18
| | | | | | | | | | | | | | | | Change-Id: Iaf1a83505ed9bdd9e79bfc46157856263c392736 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53783 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com> Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53802 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add TM WAT workaround; NDD2.2 and CDD1.1 onlyNick Klazynski2018-02-151-0/+24
| | | | | | | | | | | | | | | | Change-Id: I376860a1530ce8ba467d18ea97c0da4e6672e53f CQ: HW436858 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54056 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54073 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Disabling WOF and VDM for Nimbus DD2.0Dan Crowell2018-02-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | Modified the checks to disable WOF by default for Nimbus DD2.0 since most parts have invalid module vpd. Also changed the severity that is used to log errors getting a WOF table to make them visible logs. Without this change we won't know why the lookup failed in many cases. Change-Id: Ic8fd9b4bdc23311897363552f0c88fa2b1b0247b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53274 Reviewed-by: Francesco A. Campisano <campisan@us.ibm.com> Dev-Ready: Francesco A. Campisano <campisan@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53288 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Re-submit Axone updatesBen Gass2018-02-155-38/+267
| | | | | | | | | | | | | | | | | | | | | | | The original patch: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/45266/ was merged prematurely. It was reverted in: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/50703/ pre-commit-actions updated to call code-beautifier twice. Some generated code for initfiles changes between first and second passes. Change-Id: I25bdc2ceaf9636a2f6559775bc8cb9616848c9d7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50741 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50961 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* FIR + RAS XML updatesJoe McGill2018-02-151-2/+2
| | | | | | | | | | | | | | | | | | | p9_sbe_scominit.C mask PBCENT FIR bit 5, rely on action of unit master specific FIR bits to drive attention generation on any cresp address error condition Change-Id: I3c23aeecd426687fe91d37aadfd5ca6243c4a4b3 CQ: SW417475 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54067 Reviewed-by: Daniel J. Henderson <hende@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54082 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Mask TP LFIR for non PPE mode - p9_sbe_commonSoma BhanuTej2018-02-151-1/+9
| | | | | | | | | | | | | Change-Id: Ib8940710cadc62228be70bf60e98673ece171e10 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54024 Reviewed-by: PRADEEP N. CHATNAHALLI <pradeepcn@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54025
* Extend PM Reset flow to collect PM FFDC to HOMERAmit Tendolkar2018-02-152-2/+51
| | | | | | | | | | | | | | | | | | | | | | | | - extend the base flow to ensure ffdc gets collected to homer - revise error xmls - misc changes to handle pm recovery flow triggered via Malf Alert Key_Cronus_Test=PM_REGRESS Change-Id: I12148ed227efe4613332ae76ff142c1d82855f20 RTC: 153979 CQ: SW416537 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53522 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53532 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Retry multicast chiplet offline errors.Sachin Gupta2018-02-151-6/+22
| | | | | | | | | Change-Id: Idd3840981a8b48cdf778e104380b5c43ff07d7ba Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53980 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix missing sbe traces in errorlogspashabk-in2018-02-152-2/+2
| | | | | | | | | | | | | | There is a size limitation for build field in sf_magic_cookie_t in fsp-trace. Max size is 128 characters. But with SBE release now moving to jenkins, the path of SBE directory is long(172 chars). This fails the sbeStringFIle parsing. Change-Id: I75cc3b4028bef592f45980773be03ea2e40e7b52 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54098 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Bug fix to TOR API to not check TOR header version against TOR_VERSIONClaus Michael Olsen2018-02-141-1/+0
| | | | | | | | | | | | | | | | | | I'm removing this check because it is not a valid check for making a decision that the TOR header is invalid (it's still valid). CQ: SW416424 Change-Id: I2cdb78bc18a1fcc718038be41b2965255ba5d0de Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54017 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54022
* Project specific makefile changesspashabk-in2018-02-143-103/+68
| | | | | | | | | | | remove project dependencies from Makefile Change-Id: I0800dc7ba691234a8063d714884a5cf6c80bf8f7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53250 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Checkstop detection during IPL SBE stepsspashabk-in2018-02-145-12/+59
| | | | | | | | | | | Check for system checkstop on failure of IPL SBE steps Change-Id: I8b10e2d21a2cf3ea0c53974cd4cc98fa88bb4912 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51708 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Enable mixed core xlate; Enable xlate protection feature; Disable LSU clockgateNick Klazynski2018-02-131-0/+72
| | | | | | | | | | | | | | | | | Change-Id: I1fbc2c79330520d6033adfafe85a89fc71ed3fb0 CQ: HW437820 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53911 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53917 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix to TOR API failure on 32b systemsClaus Michael Olsen2018-02-131-1/+6
| | | | | | | | | | | | | | | | | | | | | | This fixes a bug wrt incorrect use of sizeof() on a pointer that only shows up on 32b system (but is luckily successful on 64b systems). Key_Cronus_Test=XIP_REGRESS Change-Id: I9f33c5728cb68acaeee55580c9f1c1b8743cbd8d CQ: SW412437 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53875 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53904
* Secure Boot: Blacklist: Finalize SBE white/blacklistNick Bofferding2018-02-121-31/+7
| | | | | | | | | | | | | | | | Remove all existing TODOs/workarounds in SBE white/blacklist Change-Id: Iebfdb2f3b0e064a31a143746dbb6952e0458f869 CQ: SW408603 Backport: release-fips910 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53688 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53693
* enforce strict 512 GB per socket limit on Witherspoon memory map (part2)Joe McGill2018-02-122-3/+6
| | | | | | | | | | | | | | | | | | | | | | | first commit merged before HW testing was complete, and caused issue with skiboot's detection of the MCD workaround mechanism this update restores the chip address extension HW programming to 0x7, (to avoid a coreq skiboot change) but should still restrict the allocation to lie within the first 512 GB of address space on each socket Change-Id: Ie844a609c16ffa1aa38091bae42145da9c7912a4 CQ: SW415901 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53594 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53642 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* enforce strict 512 GB per socket limit on Witherspoon memory mapJoe McGill2018-02-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SW415901 exposed a problem with the current implementation of extended addressing for Witherspoon Coral systems. With fully configured memory present in the system (8x64GB=512GB per socket), GARDing a DIMM will currently result in: - group of 6 fullying occupying 0-512GB address space - group of 1 mapped at 8TB region (2nd extended addressing region) The single group mapping has RA bit 20 active, which is problematic for the NVIDIA device driver. p9_fbc_utils.H p9.trace.scan.initfile for HW423589 option 2, enable chip address extension for chip ID LSB RA bit 21 only. This creates only one 4TB extended addressing region per socket. indirectly, this limits DIMMs to map into the 512 GB region with RA bit 21=0 and should cause an IPL failure if more than 512 GB is plugged or the memory grouping algorithm attempts to spill beyond 512 GB on a given chip p9_mss_eff_grouping.C prohibit formation of group sizes 6 and 3 when HW423589 option2 WA is active Change-Id: I997c080a2821cf3c556a4f8b35d5e0fdb34da500 CQ: SW415901 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53406 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53411 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* write_whitelist add for I2C Engine and Lock / UnLock.Srikantha Meesala2018-02-121-0/+2
| | | | | | | | | | | | Change-Id: I2531ec69eb3046509a2bb1cdab62e69c102d8909 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53811 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53812
* Capture rc in Async FFDC usecasesspashabk-in2018-02-125-3/+28
| | | | | | | | | | Update asyncrhonus failure to capture SBE rc Change-Id: Iaa49b106595dc9992d9642209a7e1821ff5be69d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53431 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Support new RISK level attribute valuesSachin Gupta2018-02-111-10/+7
| | | | | | | | | Change-Id: I007205a1f03297ea703c6e319fc9182eea614d70 CQ: SW416424 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53667 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9.npu.scom.initfile -- limit DCP0 credits for HW437173Joe McGill2018-02-111-0/+18
| | | | | | | | | | | | | | | | Change-Id: Id1dca730debe012d706fb9eb2fa236c7fb92fab8 CQ: HW437173 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53649 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: RYAN BLACK <rblack@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53671 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Updating HW414700 to also apply to Cumulus DD10Jenny Huynh2018-02-111-2/+9
| | | | | | | | | | | | | | | | | Change-Id: I565fe99adc16d8b2c56d6ca8365c77ae5bad0aef CQ: HW414700 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50287 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50369 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Revert "p9_sbe_npll_setup: Enable Spread Spectrum right after SS PLL lock""Sachin Gupta2018-02-102-5/+97
| | | | | | | | | | | | | | | | This reverts commit 59635779caa45afd1be7e483d232bb317b6c0989. Change-Id: I93708f97e5a5c44e9af1957230bb68a754e98ebb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52838 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53499 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Generation of summarized version of STOP Recovery FFDC.Prem Shanker Jha2018-02-103-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | A summary of STOP recovery FFDC is created after generation of complete FFDC. It is stored at the end of FFDC section. It is intended for copying to an error log created during second phase of STOP Recovery. Commit also incorporates some changes to support creation of PM Display from STOP Recovery FFDC. Key_Cronus_Test=PM_REGRESS CQ: SW416531 Change-Id: Ieb0bceeb141cc80b18f63b01e881e5ad3b50263d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50414 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53469 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add VPD lookup to build a supported frequency list, and bin-down supportAndre Marin2018-02-081-3/+4
| | | | | | | | | | | | | | | | | | | | | | Bypassing FFDC collection in p9_get_mem_vpd_keyword.C for unsupported configs that appear while polling the VPD for supported frequencies in the memory procedure p9_mss_freq.C. This removes the fail trace during istep to avoid user confusion. Change-Id: Ic679fb2fd8357567059f87d689acc0e0c534cd9f CQ:SW415931 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51836 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52395 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Additional risk level support - (step 1) Backward compatibilityClaus Michael Olsen2018-02-0811-157/+357
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The purpose of this commit is to avoid a coreq situation by ensuring this commit is fully propagated through our repos and test drivers before introducing the change to the new HW image with two RLs. The commit enables simultaneous support for producing a HW image and retrieving rings from an image that has either one or two risk level (RL) rings in the .rings section. The commit however does NOT actually, yet, make any changes to the image which is the aim of the (step 2) commit 53292. Nor does this commit generate any raw ring files or process any RL2 level rings yet. Again this will happen in 53292. The commit also includes, - various related cleanups in data naming and ring file processing, - some data and invironment specific parts in ring_apply.C have been moved to common_ringId.C. Key_Cronus_Test=XIP_REGRESS HW-Image-Prereq=53292 - This commit (52659) must be fully merged before merging 53292. Change-Id: I402d53c4a3ca6a084c958321069cc6f60e04ad24 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52659 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53015 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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