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* derate NVLINK frequency for Nimbus DD1Joe McGill2017-05-051-0/+17
* Performance updates for HW409069Luke Murray2017-05-051-0/+25
* Reserving HTM QueuesThi Tran2017-05-051-0/+17
* WOF: Additional fields needed in OCC Pstate Parameter block for WOFPrasad Bg Ranganath2017-05-051-0/+18
* p9_mss_setup_bars -- customize interleave granularityJoe McGill2017-05-042-0/+36
* p9_sbe_attributes.xml -- add entries for effective FBC IDsJoe McGill2017-05-041-0/+8
* p9_sbe_chiplet_reset: Revert NX_1 hang pulse back to 34sJoachim Fenkes2017-05-042-4/+2
* Change RD_CTR workaround val and update attr nameJacob Harvey2017-04-281-8/+8
* L3 initfile updatesAlex Taft2017-04-282-23/+18
* Adding HW401552 to cxa initfile to workaround clockgating bugJenny Huynh2017-04-281-0/+17
* Fixing CME TOR allocation bug in ring_apply and TOR APIClaus Michael Olsen2017-04-282-99/+97
* PM: Added support for scanning of eq_inex ring.Prem Shanker Jha2017-04-282-2/+0
* PM: Added support for PBI EQ async boundary crossing latchesPrem Shanker Jha2017-04-283-10/+33
* WOF: VRM timing, WOF and VDM enblement attributes additionsPrasad Bg Ranganath2017-04-281-1/+130
* Eff_config, volt, freq for p9cLuke Mulkey2017-04-281-5/+9
* changed hang to recoverable form checkstopEmmanuel Sacristan2017-04-281-2/+2
* Disable cp_me from the L3 for Nimbus DD1 and DD2.0.Luke Murray2017-04-281-0/+17
* p9_sbe_set_lqa and p9_sbe_hb_structures changed owner to JoshCHRISTINA L. GRAVES2017-04-281-2/+2
* Initf proc updatesAnusha Reddy Rangareddygari2017-04-284-161/+471
* INT scan initfile change to add workaround for HW408972Jenny Huynh2017-04-281-0/+18
* Updating HW363605 workaround to be applied to all chipsLuke Murray2017-04-281-17/+0
* Add NCU/L3 dials for HW396230 to p9.ncu.scom.initfileCHRISTINA L. GRAVES2017-04-284-5/+54
* IPL: Add global checkstop FIR check in Istep4Yue Du2017-04-282-22/+62
* p9_setup_bars -- support DD2 NPU SCOM address changesCHRISTINA L. GRAVES2017-04-201-0/+18
* Fixing SGPE TOR allocation bug in ring_applyClaus Michael Olsen2017-04-191-0/+1
* p9_pstate_param_blk: Define VFRT table and initialize the dataPrasad Bg Ranganath2017-04-191-0/+37
* PM: Resonant Clocking Enablement - InfrastructureChristopher M. Riedl2017-04-191-6/+6
* using literal definitionsSoma BhanuTej2017-04-192-61/+57
* PK move global data to .sdata/.sbss sections to reduce code sizeDoug Gilbert2017-04-196-13/+17
* p9_sbe_startclock_chiplets updatesAnusha Reddy Rangareddygari2017-04-191-0/+21
* Add unique FAPI RC per PIB RCSantosh Puranik2017-04-181-1/+43
* STOP: Enable CHTMYue Du2017-04-181-0/+38
* PK DEC timer interrupts too close togetherDoug Gilbert2017-04-182-10/+19
* Added read ctr bad delay workaroundStephen Glancy2017-04-181-0/+17
* Updating optimal larx/stcx dials for performanceLuke Murray2017-04-181-0/+24
* HW407123: Slow down xlink command rate for Nimbus DD1/2Jenny Huynh2017-04-181-0/+19
* p9_htm_setup -- cleanup start behavior for multi-chip systemsJoe McGill2017-04-131-8/+10
* Need to disable fast path and cmd bypass for HB loadDean Sanner2017-04-111-1/+12
* Add another writeBit API, modify getBit. Add unit tests.Andre Marin2017-04-111-4/+30
* FFDC updates - p9_start_cbsAnusha Reddy Rangareddygari2017-04-061-1/+13
* Update filter pll settings as per HW407180Ben Gass2017-04-061-0/+18
* Fix for HW397129-set bit 52 in the ALTD_OPTION reg to keep MC fastpath enabledCHRISTINA L. GRAVES2017-04-063-0/+28
* Updating L3 LCO watermarks for HW406803Luke Murray2017-04-061-0/+17
* Adding epsilon divider variable to cache initfilesLuke Murray2017-04-062-12/+24
* Updating cache epsilon initfile equationLuke Murray2017-04-062-94/+14
* Added suspend_io in p9_sbe_check_quiesce procedureRaja Das2017-04-061-0/+3
* Enabled p9_suspend_io hwp in SBE MakefileRaja Das2017-04-061-0/+1
* Change RingID to RingId_t in putRingKahn Evans2017-04-062-5/+4
* Build p9n 10 and 20 by default.Ben Gass2017-04-061-10/+50
* Do the real LPC reset for DD2CHRISTINA L. GRAVES2017-04-062-1/+33
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