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* STOP Image updatesYue Du2016-11-214-11/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit is pending to be regressed and merged. Thus, freeze puting new change feature in unless necessary fix to existing features. 1) add starting ANEP clock and drop ANEP regional fence before starting DPLL clock 2) change trace level to 1 by default change trace level 1 to only print tiny traces trace level 2 will print variable debug info trace level 3 will print all traces 3) use self restore address from header instead of hardcoded 4) enable dpll lock check when in lab 5) finish up lco settings in sgpe code 6) DTS enablement in stop/istep code 7) skip cache power off if hostAttn or localXstop 8) istep4 set special wakeup, sgpe remove when ready 9) disable dpll lock check as still work in progress 10)rebase 11)fix jenkins 12)fix db1 workaround on OR/CLR address 13)can write db1 base address directly instead of read first 14)fix self restore address fetch 15)clear pig type2/3/6 pending in sgpe setup 16)move hostAttn/localXstop read before stopclocks 17)fix typo in 16) 18)fix getscom(hostAttn/localXstop) 19)fix hrmor[13:42] Change-Id: Ibde32271db0543661c426d8eed8531ba6312c6e5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32514 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32516 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_attr_setup updatesAnusha Reddy Rangareddygari2016-11-213-0/+11
| | | | | | | | | | | | | | | | | | | | | | set the ATTR_IS_SP_MODE attribute from MBX scratch reg 3 CQ : HW393961 Change-Id: Id1eb51173451680367de614c114bd0732a678e5b Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32468 Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32469 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Istep4: Enable poll for DPLL lock in p9_hcd_cache_dpll_setupYue Du2016-11-2112-37/+106
| | | | | | | | | | | | | | | | | | | | | | | changes in this commit: 1) enable dpll lock checking in non-sim envrionment 2) change FAPI_DBG lines on set/reset sdis_n ops as removing prints saying they are DD1 only workaround due to they are permenant steps now 3) add missing content of p9_hcd_core_dcc_skewadjust 4) add DD2 sram_enable support (NOOP for DD1) Change-Id: I74fc3b05781e7cd13bb8c95b0dc7389029d7c5af Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31719 Reviewed-by: Joseph E. Dery <dery@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31810 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Setup MCS ack'er based on target HRMORDean Sanner2016-11-201-0/+10
| | | | | | | | | | | | | Change-Id: I0eb92357aa788f22cbe64547e5e4c97d99589b1d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31963 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31965 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add new attribute file that contains pervasive SBE only attrscrgeddes2016-11-151-0/+26
| | | | | | | | | | Change-Id: I9d8ff081b7b0b7068e45318c64d6d6c44e68ea43 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31274 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fixed offsets of newly added cache rings (ex_l2_fure1,ex_l3_fure1)Prasad Bg Ranganath2016-11-111-43/+43
| | | | | | | | | | | | | | | Change-Id: Iaa6c1d042baa5449c4c7d572965f327a3866589a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32531 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32532 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* MPIPL Start Chipops and Mpipl istep implementationRaja Das2016-11-112-0/+6
| | | | | | | | | | Change-Id: If0579dfdfb10eb42bc837107e38361512a416b03 RTC: 123696 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30367 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* HB: fix HB core boot resulting cme bootYue Du2016-11-101-0/+15
| | | | | | | | | | | | | | | | | Change-Id: I18f7c24dc84536126a90a251ae770b0498b5d3d0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31138 Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31162 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add get XFVC in p9_clkoff_getreg and fix some issues in ramming procedureLiuYangFan2016-11-101-14/+131
| | | | | | | | | | | | | | | Change-Id: I433c003fd30c6414b6d8dd569683ba21c310ff65 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32286 Reviewed-by: Peng Fei Gou <shgoupf@cn.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32287 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add EC feature levels to MSS workaroundsBrian Silver2016-11-101-12/+140
| | | | | | | | | | | | | | | | Change-Id: Iec6db88808f26353ce88f9038222db12f2d9b6c0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32421 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32426 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PM: Customization of CME and SGPE rings in HOMER.Prem Shanker Jha2016-11-101-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Extracts rings from hardware image and VPD and stashes in to a temp buffer using HWP p9_xip_customize. Subsequently, using TOR API creates a fresh and leaner layout of scan rings in HOMER. - Implements a debug infrastructure to verify the scan ring layout in HOMER. - Implemented scan ring overrides for core common and cache common rings. - Introduces size check for various sections of HOMER. Change-Id: I8d7785f632823c31077bd4f320c453129be4ef0c RTC:157954 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27697 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30395 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* nest_attributes -- add initToZero tags for chip contained executionJoe McGill2016-11-101-0/+10
| | | | | | | | | | | | | | | | | | | init memory bases/sizes attributes to permit execution of proc_setup_bars without mss_eff_grouping Change-Id: I798f29be3d49751a23e04bb63e6453f2ab7fb2ae Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32460 Reviewed-by: Camille R. Mann <camille@us.ibm.com> Dev-Ready: Camille R. Mann <camille@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32462 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_pba_coherent_utils -- correct LCO targeting in PBA SLVCTLJoe McGill2016-11-091-2/+2
| | | | | | | | | | | | | | Change-Id: I780b1b0d5068800b5be522219547d8a6584dde4c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32304 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32305 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Istep4: add L3-LCO target setup to cache_scominitYue Du2016-11-091-7/+71
| | | | | | | | | | | | | | Change-Id: If8ccebafeffb000bd8c03047fa1ee31b581715e7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31883 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31884 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Move to additive multicast group setup for cores and caches in single modeGreg Still2016-11-092-79/+145
| | | | | | | | | | | | | | | | | | | | | - p9_sbe_chiplet_reset: only setup core and cache MC groups in force all cores mode - p9_sbe_select_ex: in single mode, add master core to Group 0 (functional chiplets) and Group 1 (functional cores); add master cache to Group 0 (functional chiplets) Change-Id: Ib304854232d76153ba3a32b61df4daff580e9fba RTC: 164111 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32299 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32301 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_pstates.h breakupGreg Still2016-11-082-42/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - content needed by all platforms - cmeqm content created by p9_pstate_parameter_block for CME Hcode - occ content created by p9_pstate_parameter_block for OCC FW - pgpe content created by p9_pstate_parameter_block for PGPE Hcode - API definitions between PGPE Hcode and OCC FW including the current shared memory definition. - the IPC commands are update to better match OCC discussions - Addressed OCC FW<>PGPE Hcode review / Gerrit comments - Still have a HB and Jenkins fail with the p9_pm_utils. Cronus is fine. - Deleted ../hwp/lib/p9_pstate_parameter_block.C in deference to already merged ../hwp/pm/p9_pstate_parameter_block.C - Update IDDQ member names to be more descriptive to match WOF discussion - Remove endianess checks in p9_pm_utils.H Change-Id: I6ab884af08d5598da08bded1707b57c471f2f594 RTC: 163927 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29915 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29916 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* sector buffer,pulse mode attributesAnusha Reddy Rangareddygari2016-11-084-0/+150
| | | | | | | | | | | | | | | | | | * p9_sbe_chiplet_reset * p9_sbe_npll_setup Change-Id: I488e9cda493e34f36dc60edccd7bec02582878b1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32106 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32164 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Ring support (Cronus safe): Adding ex_l2/l3_fure_1 to RingID list.Claus Michael Olsen2016-11-083-47/+60
| | | | | | | | | | | | | | | | | | This commit simply adds the rings at the very end of the RingID list in p9_ring_id.h in an attempt to not interfere with the precompiled built-in version of this header file in Cronus. Change-Id: I3f7b5db5835688adddf060910a2af88bb9b477ba Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32272 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32277 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Commit for PLL unlock error unmask in pcb slave config reg IPL xls Ver 222Srinivas Naga2016-11-082-0/+23
| | | | | | | | | | | | | Change-Id: Ic7116ab8e57632112b8cbaa856e5107367c799c9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32083 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Anusha Reddy Rangareddygari <anusrang@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32085 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_tp_chiplet_init1: Enable PCB automatic reset on timeoutJoachim Fenkes2016-11-041-0/+4
| | | | | | | | | | | | | | | | No more weird error messages because a stuck chiplet got the entire PCB network stuck. Change-Id: I05b7220fcd4ef4322075197214707f04837fd1f6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32218 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32219 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* TOR API: Introducing API to expose TOR version and wrappers.Claus Michael Olsen2016-11-042-0/+19
| | | | | | | | | | | | | | Change-Id: Id13f51cde14a4f0f7d59c1bb09d26d8d65342b05 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32074 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32077 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_tor: l_ prefix for local variable instead of iv_Martin Peschke2016-11-041-27/+27
| | | | | | | | | | | | | | | | | Naming didn't follow the rules and thereby got in my way when I was searching for something else. Change-Id: I185b1531a554daf6cc8dbffb46e42cb17f75677d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31773 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31774 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix for premature SBE<>HB STOP 15 deadman exitGreg Still2016-11-041-1/+1
| | | | | | | | | | | | | | | | | | | - move to using requested level vs actual - Add CIs Change-Id: I619ed4a2153f91d061ef0a3b2cec0f1548b2315e RTC: 163409 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31715 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31748 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* p9_sbe_attr_setupAnusha Reddy Rangareddygari2016-11-041-13/+272
| | | | | | | | | | | | | | | | Support for BMC machines Change-Id: I91148e7e83a79900e5e6a2fdde8bdb378bbb26de Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32110 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32115 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* xip_tool: Minor cleanupClaus Michael Olsen2016-11-041-5/+4
| | | | | | | | | | | | | | | Change-Id: Ida5384bcd899313b9f822261a6aa1d94500e87b0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32109 Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Reviewed-by: Richard J. Knight <rjknight@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32120 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* ring_apply: Minor cleanupsClaus Michael Olsen2016-11-041-0/+1
| | | | | | | | | | | | | | Change-Id: I95b33b5472ac6d18b266b5c3868d0da92e9f0f39 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32130 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Peschke <mpeschke@de.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32135 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Stopclocks: fix state checking return code being current_errYue Du2016-11-021-37/+22
| | | | | | | | | | | | | | | Change-Id: Iabafe83b2c726a0fc446a28dd0e971e43b753606 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31924 Dev-Ready: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31927 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fix ramming procedure issueLiuYangFan2016-11-011-2/+2
| | | | | | | | | | | | | | | Change-Id: Iae4d922782c91240e8d004585b0e92c442a89b21 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31944 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31945 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_psi_init -- parametrize link speed (half/full)Joe McGill2016-10-311-0/+18
| | | | | | | | | | | | | | | | | | | Wrapper tested on zzfp033 Appears to correctly trigger half speed mode from FSP tool feedback $ cat /sys/devices/psi_link0/clock FSP-2, PSI(0) CLK overwrite: 1 Speed: 166 MHz Change-Id: I45997c30e71457ceedfcba70550f0e6d98584a1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31497 Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31569 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Remove PPE_LIBPATH.Doug Gilbert2016-10-311-4/+4
| | | | | | | | | | | | | | Change-Id: I010cc735686bb99ba42cc193120716030dbb5532 RTC: 163813 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31999 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32000 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* ppe42 Icache aligned divideDoug Gilbert2016-10-313-45/+60
| | | | | | | | | | | | | | | Change-Id: Ibb58bdd022641857cc94fbf17c5977a600a5bb6a RTC:147209 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30374 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Dev-Ready: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30379 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Change TIME_INTERVAL_TYPE to uint64_t in SSX and PKDoug Gilbert2016-10-281-1/+1
| | | | | | | | | | | | | | Change-Id: I74a9c299ce5a49bcd0b070d134c1f4adcc357e63 RTC: 163135 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31466 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31473 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_mcs_setup -- qualify MCS/MI assert for PPE platform onlyJoe McGill2016-10-281-0/+5
| | | | | | | | | | | | | | | permit Cronus IPL with no MCS/MI units on master chip Change-Id: Ia988c8ecb35c93d549b899e673ce20c4da30cec2 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31841 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31843 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_chiplet_resetAnusha Reddy Rangareddygari2016-10-281-1/+79
| | | | | | | | | | | | | | | | | | | | *do a scan0 to all OBUS chiplets independent of partial good information *Assert sram enable(CQ : HW390523) Change-Id: I61ff088384dac02b44daa7f9cedc887805a87e7f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31892 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com> Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com> Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31894 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_scominit -- configure FBC personalization for MC chipletsJoe McGill2016-10-281-7/+7
| | | | | | | | | | | | | | | Change-Id: I3cc772c6a9edc1f060a47ed6160423a3e9f60559 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31911 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31913 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Thread Control Stop precedure updateRaja Das2016-10-281-47/+60
| | | | | | | | | | | | | | RTC: 163286 Change-Id: Ideed55453791c461e10dc731aab0409d5b7cccad Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31604 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31607 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* Fixing order of setting clock muxes & functional reset & removing sim only scomsCHRISTINA L. GRAVES2016-10-271-40/+5
| | | | | | | | | | | | | Change-Id: I6234bfa16add15f7d1cd1cecc47b0e4f05733846 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31845 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31852 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* SBE Makefile cleanup for hwp/lib directoryRaja Das2016-10-272-96/+0
| | | | | | | | | | Change-Id: I6610811d30d19248c0ccf40f48fceb06db95c0b5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31315 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Removing three pibnet rings.Claus Michael Olsen2016-10-273-26/+18
| | | | | | | | | | | | | Change-Id: I44fdbb857ca1fe578e097ce3871b3d65f608a6d9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31739 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31880 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_hcd_core_startclocks -- set CPLT_CONF0 system/group/chip ID fieldsJoe McGill2016-10-261-0/+19
| | | | | | | | | | | | | | | | required to configure the PIR SPR correctly on multi-socket systems Change-Id: Iadfcd5bd52e1ea1914de98c6a76e36a9f5d2e36a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31795 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31798 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* PPM reg collision (HW389511) work-around: Special Wake-upChristopher Riedl2016-10-261-0/+17
| | | | | | | | | | | | | | | | | | - fixed screwed-up/duplicate commits - addressed code review comments and implemented FAPI_ASSERT conditions for the error case(s) Change-Id: I706b3247f0f9c3ea241ae2841fbce456577c78b6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31379 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31381 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Add LSU and VSU Workarounds and make TC_FIR informationalNick Klazynski2016-10-261-2/+2
| | | | | | | | | | | | | | | Change-Id: If3ecb49a4a7d0df3389a6420a72714c860c9f1ea Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31793 Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Dev-Ready: James N. Klazynski <jklazyns@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31796 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Istep4: add enable auto special wakeup after core is upYue Du2016-10-262-3/+10
| | | | | | | | | | | | | | | Change-Id: I165c99b16998b1c4961008db4bcf054330209e8c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31566 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31571 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* cache/core/l2_stopclocks updatesYue Du2016-10-268-207/+325
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | patchset 1: skip l2_stopclocks if ex_select is 0 patchset 2: check power state before execute hwp patchset 3: fix syntax typos from patch 2 update patchset 4: add chiplet accessibility check patchset 5: add possible counter to CME PCBMUX patchset 6: add skipping message on check patchset 7: change polling timout method patchset 8: add a missing comma patchset 9: fix ffdc patchset 10:roll back cme pcbmux counter until check to ensure cme accessibility patchset 11:rebased patchset 12:initial checkin of ppe state handling patchset 13:checkin new clk_ctrl_state procedure patchset 14:add attribute xml for new procedure patchset 15:fix calling the p9_common_clk_ctrl_state patchset 16:Matt rebase patchset 17:Warning instead of fail with error on check delete common C file, include only header Change-Id: I14c9480ac0931ac7f8b456f193148ceb3b939947 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28808 Dev-Ready: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30365 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_activate_stop15_cores Level 2Greg Still2016-10-251-1/+1
| | | | | | | | | | | | | | | | | | | | - This procedure is used by Cronus only - Error case FFDC collection (readout) is NOT complete. - Catch Gerrit push messages - Rebased - Fixed testing bugs Change-Id: Ib795b0d87cb7562200f54b2463768c4655b39fc9 RTC: 136651 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21434 Dev-Ready: Gregory S. Still <stillgs@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21435 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* p9_sbe_chiplet_reset -- correct swapped FBC early/early exit hang poll timersJoe McGill2016-10-251-4/+4
| | | | | | | | | | | | | | Change-Id: Iab0755ad85a13253da9272d69173d544cab3dfa7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31623 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31689 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Removing adding extra FFDC data. Also removing phb includes.CHRISTINA L. GRAVES2016-10-241-25/+2
| | | | | | | | | | | | | Change-Id: I862c02033184e0ae5baf0a220e74d2d0ed47852e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31545 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31709 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Adding in system checkstop if anything fails and removing PHB targetsCHRISTINA L. GRAVES2016-10-242-40/+102
| | | | | | | | | | | | | | Change-Id: I0c29498adb2b7539955ec3bc4e6772f037ca017e Original-Change-Id: Iafec57d821b7ef012e9094cc911e4e5aa41d315a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30171 Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31708 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* Fixing field name changes for PU_OCB_PIB_OCRSoma BhanuTej2016-10-241-1/+1
| | | | | | | | | | | | Change-Id: Ic7056e0e8befc0c110634b58717a1df83da20596 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30088 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31707 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
* L2 for p9_sbe_check_quiesceCHRISTINA L. GRAVES2016-10-242-152/+538
| | | | | | | | | | | | | Change-Id: Id8c94e40458703006eb8d9fb63681b03cc48e18c Original-Change-Id: I23a267f50d6bff3c4099fe3bc90deaff87099250 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28563 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31706 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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